參數(shù)資料
型號： LM25066APSQE
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 電源管理
英文描述： POWER SUPPLY SUPPORT CKT, QCC24
封裝： LLP-24
文件頁數(shù)： 45/48頁
文件大小： 1658K
代理商： LM25066APSQE
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
Telemetry Accuracy
IIN
FSR
Current input full scale range
CL = GND
30.2
mV
CL = VDD
60.4
mV
IIN
LSB
Current input LSB
CL = GND
7.32
V
CL = VDD
14.64
V
VAUX
FSR
VAUX input full scale range
1.16
V
VAUX
LSB
VAUX input LSB
283.2
V
VIN
FSR
Input voltage full scale range
18.7
V
VIN
LSB
Input voltage LSB
4.54
mV
IIN
ACC
Input Current Accuracy
VIN – SENSE = 25mV, CL = GND
T
J = 10°C to 85°C
-1
+1
%
VIN – SENSE = 25mV, CL = GND
-1.2
+1
VIN – SENSE = 50mV, CL = GND
-1.8
+1.8
VIN – SENSE = 5mV, CL = GND
T
J = 10°C to 85°C
-5
+5
V
ACC
VAUX, VIN, VOUT Accuracy
VIN, VOUT = 12V, VAUX = 1V
T
J = 10°C to 85°C
-1
+1
%
VIN, VOUT = 12V
VAUX = 1V
-1
+1.2
PIN
ACC
Input Power Accuracy
VIN = 12V, VIN – SENSE = 25mV,
CL = GND, T
J = 10°C to 85°C
-2
+2
%
VIN = 12V, VIN – SENSE = 25mV,
CL = GND
-2.3
+2
Remote Diode Temperature Sensor
T
ACC
Temperature Accuracy Using Local
Diode
T
A = 10°C to 85°C
2
10
°C
Remote Diode Resolution
9
bits
I
DIODE
External Diode Current Source
High level
250
300
A
Low level
9.4
A
Diode Current Ratio
26
PMBus Pin Thresholds (SMBA, SDA, SCL)
V
IL
Data, Clock Input Low Voltage
0.8
V
IH
Data, Clock Input High Voltage
2.1
5.5
V
OL
Data Output Low Voltage
I
PULLUP = 500 A
0
0.4
V
I
LEAK
Input Leakage Current
SDA, SMBA, SCL = 5V
1
A
Configuration Pin Thresholds (CB, CL, RETRY)
V
IH
Threshold Voltage
3
V
I
LEAK
Input Leakage Current
CL, CB, RETRY = 5V
1
mA
Thermal
θ
JA
Junction to Ambient
42.3
°C/W
θ
JC
Junction to Case
9.5
°C/W
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and conditions, see the Electrical Characteristics.
Note 2:
The human body model is a 100 pF capacitor discharged through a 1.5 k
resistor into each pin.
Note 3:
Current out of a pin is indicated as a negative value.
Note 4:
OUT bias current (disabled) due to leakage current through an internal 0.9 M
resistance from SENSE to VOUT.
Note 5:
Junction-to-ambient thermal resistance is highly application and board layout dependent. Specified thermal resistance values for the package specified
is based on a 4-layer, 4"x3", 2/1/1/2 oz. Cu board as per JEDEC standards is used.
Note 6:
The GATE pin voltage is typically 7.5V above VIN when the LM25066A is enabled. Therefore the Absolute Maximum Rating of 24V for VIN and SENSE
apply only when the LM25066A is disabled or for a momentary surge to that voltage since the Absolute Maximum Rating of the GATE pin is 20V.
Note 7:
All limits are guaranteed. All electrical characteristics having room temperature limits are tested during production at T
A = 25°C. All hot and cold limits
are guaranteed by correlating the electrical characteristics to process and temperature variations and applying statistical process control.
www.national.com
6
LM25066A
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