參數(shù)資料
型號(hào)： LM12L458
廠商： National Semiconductor Corporation
英文描述： 12-Bit Sign Data Acquisition System with Self-Calibration
中文描述： 12位注冊數(shù)據(jù)采集系統(tǒng)自校準(zhǔn)
文件頁數(shù)： 7/36頁
文件大?。?/td> 695K
代理商： LM12L458
Digital Timing Characteristics
(Continued)
Note 7:
V
+ and V
D
+ must be connected together to the same power supply voltage and bypassed with separate capacitors at each V
+
pin to assure conversion/
comparison accuracy.
Note 8:
Accuracy is guaranteed when operating at f
CLK
= 6 MHz.
Note 9:
With the test condition for V
REF
= V
REF+
V
REF
given as +2.5V, the 12-bit LSB is 305 μV and the 8-bit/“Watchdog” LSB is 4.88 mV.
Note 10:
Typicals are at T
A
= 25C and represent most likely parametric norm.
Note 11:
Limits are guaranteed to National’s AOQL (Average Output Quality Level).
Note 12:
Positive integral linearity error is defined as the deviation of the analog value, expressed in LSBs, from the straight line that passes through positive
full-scale and zero. For negative integral linearity error the straight line passes through negative full-scale and zero. (See Figures 6, 7).
Note 13:
Zero error is a measure of the deviation from the mid-scale voltage (a code of zero), expressed in LSB. It is the worst-case value of the code transitions
between 1 to 0 and 0 to +1 (see Figure 8).
Note 14:
The DC common-mode error is measured with both inputs shorted together and driven from 0V to 2.5V. The measured value is referred to the resulting
output value when the inputs are driven with a 1.25V signal.
Note 15:
Power Supply Sensitivity is measured after Auto-Zero and/or Auto-Calibration cycle has been completed with V
A
+ and V
D
+ at the specified extremes.
Note 16:
V
REFCM
(Reference Voltage Common Mode Range) is defined as (V
REF+
+ V
REF
)/2.
Note 17:
The LM12L458’s self-calibration technique ensures linearity and offset errors as specified, but noise inherent in the self-calibration process will result in
a repeatability uncertainty of
±
0.10 LSB.
Note 18:
The Throughput Rate is for a single instruction repeated continuously. Sequencer states 0 (1 clock cycle), 1 (1 clock cycle), 7 (9 clock cycles) and 5 (44
clock cycles) are used (see Figure 15). One additional clock cycle is used to read the conversion result stored in the FIFO, for a total of 56 clock cycles per con-
version. The Throughput Rate is f
CLK
(MHz)/N, where N is the number of clock cycles/conversion.
DS011711-4
www.national.com
7
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LM12L458_06 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit + Sign Data Acquisition System with Self-Calibration
LM12L458CIV 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
LM12L458CIV/NOPB 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
LM12L458CIVF 制造商:Rochester Electronics LLC 功能描述:12-BIT PARALLEL I/O DAS - Bulk
LM12L458CIVF/NOPB 制造商:Texas Instruments 功能描述:ADC Single 114ksps 12-bit+Sign Parallel 44-Pin PLCC
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