參數(shù)資料
型號: LM1229VEC
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 運動控制電子
英文描述: I2C Compatible CMOS TV RGB and Deflection Processor
中文描述: WAVEFORM GENERATION, PQFP64
封裝: PLASTIC, QFP-64
文件頁數(shù): 10/27頁
文件大?。?/td> 969K
代理商: LM1229VEC
Application Information
PIN CONNECTIONS
Pin
No.
1
2
Pin Name
Schematic
Description
C
ALC
C
OSC
C
ALC
is the feedback loop filter which maintains
constant vertical ramp amplitude according to the
value set in the vertical height register.
C
OSC
is the capacitor which determines the
slope of the vertical ramp.
3
4
VDRIVE
OUT
VDRIVE
REF
These two outputs provide the inputs to a
vertical output amplifier which drives the vertical
yoke winding. Since the VDRIVE
OUT
amplitude is
from 1.5V to 2.5V peak to peak, the gain of the
output amplifier must be set with external
resistors to match the vertical yoke being used.
The VDRIVE
OUT
slope is positive (increasing
voltage with time).
5
6
7
23
54
V
REF
Caps
Provides filtering for the internal voltages which
set the internal bias currents in conjunction with
R
EXT
. For proper filtering, pins 5, 6 and 7 should
be 10 μF, pin 23 should be 54 μF and pin 54
should be .01 μF. These capacitors should be
placed as close to their pins as possible.
8
VEHT1
This input pin is used to control the height of the
vertical ramp based on changes in the high
voltage. A 1V negative change at pin 8 causes a
maximum of 5% reduction in the ramp amplitude
when the VEHT[3:0] is set to 0xF. If this pin is
not used, bit 3 of the SYNCPOL register should
be set to 1. The values shown give a 350 mV
change at pin 8 from a 2.5V change at the ABL
pin.
This input pin is used to control the level of the
E-W parabola based on changes in the high
voltage. A 1V negative change at pin 9 causes a
maximum of 300 mV increase in the ramp DC
level when the VEHT[7:4] is set to 0xF. If this pin
is unused, bit 4 of the SYNCPOL register should
be set to 1. The values shown give a 350 mV
change at pin 9 from a 2.5V change at the ABL
pin.
9
VEHT2
L
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