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參數(shù)資料
| 型號(hào)： | LC89515K |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | CD-ROM/CD-I Error Correction/ Host Interface LSI |
| 中文描述： | CD-ROM/CD-I糾錯(cuò)/主機(jī)接口LSI |
| 文件頁(yè)數(shù)： | 2/6頁(yè) |
| 文件大?。?/td> | 57K |
| 代理商： | LC89515K |
System Block Diagram
Pin Assignment
Type: I: Input pin, O: Output pin, B: Bidirectional pin, P: Power supply pin, NC: No connection
Note: Do not leave any of the V
DD
or V
SS
pins open. All of the V
DD
and V
SS
pins must be connected to ground or the power supply, respectively.
No. 4272-2/6
LC89515K
Pin No.
Pin
Type
Pin No.
Pin
Type
Pin No.
Pin
Type
1
V
SS
RA6
P
28
TEST2
I
55
HWR
I
2
O
29
CSEL
I
56
HRD
I
3
RA7
O
30
LMSEL
I
57
CMD
I
4
RA8
O
31
V
DD
LRCK
P
58
WAIT
O
5
RA9
O
32
I
59
DTEN
O
6
RA10
O
33
SDATA
I
60
STEN
O
7
RA11
O
34
BCK
I
61
EOP
O
8
RA12
O
35
C4LR
I
62
RCS
O
9
RA13
O
36
C2PO
I
63
HDE
O
10
RA14
O
37
MCK
O
64
V
SS
HD7
P
11
RA15
O
38
D0
B
65
B
12
RWE
O
39
D1
B
66
HD6
B
13
V
SS
ROE
P
40
D2
B
67
HD5
B
14
O
41
V
SS
D3
P
68
HD4
B
15
ERA
B
42
B
69
HD3
B
16
IO8
B
43
D4
B
70
HD2
B
17
IO7
B
44
D5
B
71
HD1
B
18
IO6
B
45
D6
B
72
HD0
B
19
IO5
B
46
D7
B
73
V
DD
SELDRQ
P
20
IO4
B
47
RS
I
74
I
21
IO3
B
48
RD
I
75
RA0
O
22
IO2
B
49
WR
I
76
RA1
O
23
IO1
B
40
CS
I
77
RA2
O
24
V
SS
XTALCK
P
51
INT
O
78
RA3
O
25
I
52
V
SS
RESET
P
79
RA4
O
26
XTAL
O
53
I
80
RA5
O
27
TEST1
I
54
ENABLE
I
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