參數(shù)資料
型號(hào): LC662306A
廠商: Sanyo Electric Co.,Ltd.
英文描述: Four-Bit Single-Chip Microcontrollers with 6 KB of On-Chip ROM(4位單片微控制器(帶6K字節(jié)片上ROM))
中文描述: 四位單芯片6 KB的片上ROM微控制器(4位單片微控制器(帶6清音字節(jié)片上光盤))
文件頁(yè)數(shù): 6/25頁(yè)
文件大?。?/td> 158K
代理商: LC662306A
Continued from preceding page.
Note: Pull-up MOS type: The output circuit includes a MOS transistor that pulls the pin up to V
DD
.
CMOS output: Complementary output.
OD output: Open-drain output.
No. 5483-6/25
LC662304A, 662306A, 662308A, 662312A, 662316A
Pin
I/O
Overview
Output driver type
Options
State after a Standby mode
reset
operation
P50
P51
P52
P53/INT2
P60/ML
P61
P62/DT
P63/PIN1
PC2
PC3
PD0/INV2I
PD1/INV2O
PD2/INV3I
PD3/INV4O
PE0
PE1
OSC1
OSC2
RES
TEST
V
DD
V
SS
I/O ports P50 to P53
Input or output in 4-bit or 1-bit units
Input or output in 8-bit units when used
in conjunction with P40 to P43.
Can be used for output of 8-bit ROM
data when used in conjunction with
P40 to P43.
P53 is also used as the INT2 interrupt
request.
I/O ports P60 to P63
Input or output in 4-bit or 1-bit units
P60 is also used as the melody output
ML pin.
P62 is also used as the tone output DT
pin.
P63 is also used for the event count
input to timer 1.
I/O ports PC2 to PC3
Output in 2-bit or 1-bit units
Dedicated input ports PD0 to PD3
Dedicated inverter circuits (option)
Dedicated input ports
System clock oscillator connections
When an external clock is used, leave
OSC2 open and connect the clock signal
to OSC1.
System reset input
When the P33/HOLD pin is at the high
level, a low level input to the RES pin will
initialize the CPU.
CPU test pin
This pin must be connected to V
SS
during normal operation.
Power supply pins
I/O
I/O
I/O
I
I
I
O
I
I
Pch: Pull-up MOS type
Nch: Intermediate sink current
type
Pch: CMOS type
Nch: Intermediate sink current
type
Nch: +12-V handling when
OD option selected (P61 and
P63 only)
Pch: CMOS type
Nch: Intermediate sink current
type
When the inverter circuit
option is selected.
Pch: CMOS type
Nch: Intermediate sink current
type
Pull-up MOS or
Nch OD output
Output level on
reset
CMOS or Nch OD
output
CMOS or Nch OD
output
Inverter circuits
Ceramic oscillator
or external clock
selection
High or low
(option)
H
H
Normal
input or
inverter I/O
(option)
Normal
input
Option
selection
Hold mode:
Output off
Hold mode:
Output off
Hold mode:
Port output
off
Inverter
Hold
mode:
output off
Halt mode:
output
continues
Hold mode:
Oscillator
stops
Halt mode:
Oscillator
continues
Halt mode:
Port output
retained
Halt mode:
Output
retained
Halt mode:
Output
retained
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