參數(shù)資料
型號: LC4101C
廠商: Sanyo Electric Co.,Ltd.
英文描述: LCD Dot Matrix Segment Driver for STN Displays
中文描述: 液晶點陣段驅(qū)動STN彩屏
文件頁數(shù): 5/9頁
文件大?。?/td> 86K
代理商: LC4101C
Pin Functions
No. 5280-5/9
LC4101C
Symbol
I/O
Function
OUT1 to
OUT240
V
0
V
2
V
3
V
5
V
EE1
/V
EE2
V
SS1
/V
SS2
DISP
DF
LOAD
L/R
EIO1
EIO2
O
I
I
I
I
I
I
I
I
I/O
I/O
LCD drive outputs
Note:
*
don’t care (0 or 1).
V
0
level drive voltage input
V
2
level drive voltage input
V
3
level drive voltage input
V
5
level drive voltage input
All pins with the same name must be set to the same potential.
High-voltage block power supply. V
EE1
and V
EE2
must have the same potential.
High-voltage block ground. V
SS1
and V
SS2
must have the same potential.
All outputs will be held at a fixed V
5
level when this pin is low.
Alternation input
CP
I
Data acquisition clock (falling edge)
Data load clock (falling edge)
BS
I
4-bit/8-bit switching signal; high: 8 bits, low: 4 bits
8
×
30: Data latch (BS = high)
Note: The numbers 1 to 240 in the table indicate OUT output numbers.
Enable inputs and outputs
Enable inputs: Tie the first stage enable input to V
SS
, and then connect the enable input of each following stage to the enable
output of the preceding stage.
Enable outputs: When connecting multiple chips in cascade, connect the enable output to the enable input of the next stage.
DF
Data
DISP
OUTn
1
1
1
V
0
V
2
V
3
V
5
V
5
1
0
1
0
0
1
0
1
1
*
*
0
L/R
EIO1
EIO2
L
In
Out
H
Out
In
L/R
CP:
1
2
3
4
29
30
D7
1
9
17
25
225
233
D6
2
10
18
26
226
234
D5
3
11
19
27
227
235
L
D4
4
12
20
28
228
236
D3
5
13
21
29
229
237
D2
6
14
22
30
230
238
D1
7
15
23
31
231
239
D0
8
16
24
32
232
240
D7
240
232
224
216
16
8
D6
239
231
223
215
15
7
D5
238
230
222
214
14
6
H
D4
237
229
221
213
13
5
D3
236
228
220
212
12
4
D2
235
227
219
211
11
3
D1
234
226
218
210
10
2
D0
233
225
217
209
9
1
Continued on next page.
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