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參數(shù)資料
| 型號： | L64222 |
| 廠商： | LSI CORP |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP208 |
| 封裝： | PLASTIC, QFP-208 |
| 文件頁數(shù)： | 9/32頁 |
| 文件大小： | 248K |
| 代理商： | L64222 |
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L64222 DVD Audio/Video Decoder
17
Video Interface
PD[7:0]
Pixel Data Output Bus
Output
The PD[7:0] bus carries the pixel data for the
reconstructed pictures. The pixel data is formatted in
ITU_R BT.601 Y, Cb, Cr chromaticity.
CREF
Chroma Reference
Output
The Video Interface asserts CREF when the Cb
component of Chroma is on PD[7:0] and deasserts it at
all other times.
BLANK
Blank
Input/Output
BLANK is a composite blank output from the L64222
display controller or the NTSC/PAL Encoder. An external
BLANK signal can also be brought into the chip to drive
the on-chip NTSC/PAL Encoder. Its polarity is user-
dened.
OSD_ACTIVE
On-Screen Display
Output
The Memory Interface asserts this signal to indicate that
the on-chip OSD pixel on PD[7:0] is nontransparent. This
signal indicates which pixels have mixed OSD.
EXT_OSD[3:0]
Palette Selection Bus
Input
The host controls an external device (such as a character
generator) to write half-bytes across this bus to select
colors from a 16-color look-up table in the L64222 to be
used for external OSD.
HS
Horizontal Sync
Input
HS is the horizontal sync signal from the PAL/NTSC
Encoder. HS is used to reset the horizontal counters in
the display controller. HS should be synchronous to
SYSCLK.
VS
Vertical Sync/Odd-Even Field Indicator
Input
VS is the vertical sync signal from the PAL/NTSC
Encoder. It can be programmed to be either a
conventional vertical sync input or an even/odd eld
indicator. In the even/odd eld indicator mode, the
internal display controller counters reset each time VS
changes state (at the beginning of each eld). The
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