參數(shù)資料
型號(hào)： KXPC8260ZUIHBC
廠商： Freescale Semiconductor
文件頁數(shù)： 7/41頁
文件大小： 0K
描述： IC MPU POWERQUICC II 480-TBGA
標(biāo)準(zhǔn)包裝： 2
系列： MPC82xx
處理器類型： 32-位 MPC82xx PowerQUICC II
速度： 200MHz
電壓： 2.5V
安裝類型： 表面貼裝
封裝/外殼： 480-LBGA
供應(yīng)商設(shè)備封裝： 408-TBGA（37.5x37.5）
包裝： 托盤
MPC8260 PowerQUICC II Integrated Communications Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
15
Electrical and Thermal Characteristics
Figure 5 shows the SCC/SMC/SPI/I2C external clock.
Figure 5. SCC/SMC/SPI/I2C External Clock Diagram
Figure 6 shows the SCC/SMC/SPI/I2C internal clock.
Figure 6. SCC/SMC/SPI/I2C Internal Clock Diagram
Serial CLKin
SCC/SMC/SPI/I2C input signals
SCC/SMC/SPI/I2C output signals
sp18b
sp19b
sp38b/sp39b
(See note)
Note: There are four possible timing conditions for SCC and SPI:
1. Input sampled on the rising edge and output driven on the rising edge (shown).
2. Input sampled on the rising edge and output driven on the falling edge.
3. Input sampled on the falling edge and output driven on the falling edge.
4. Input sampled on the falling edge and output driven on the rising edge.
BRG_OUT
SCC/SMC/SPI/I2C input signals
SCC/SMC/SPI/I2C output signals
sp18a
sp19a
sp38a/sp39a
(See note)
Note: There are four possible timing conditions for SCC and SPI:
1. Input sampled on the rising edge and output driven on the rising edge (shown).
2. Input sampled on the rising edge and output driven on the falling edge.
3. Input sampled on the falling edge and output driven on the falling edge.
4. Input sampled on the falling edge and output driven on the rising edge.
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