參數(shù)資料
型號: KSZ8895MQI
廠商: Micrel Inc
文件頁數(shù): 115/119頁
文件大?。?/td> 0K
描述: IC ETHERNET SWITCH 5PORT 128PQFP
特色產(chǎn)品: KSZ8895MQ Ethernet Switches
標準包裝: 66
系列: *
其它名稱: 576-3997
2011-2012 Microchip Technology Inc.
Preliminary
DS41579C-page 95
PIC16(L)F1782/3
9.2
Low-Power Sleep Mode
The PIC16(L)F1783 device contains an internal Low
Dropout (LDO) voltage regulator, which allows the
device I/O pins to operate at voltages up to 5.5V while
the internal device logic operates at a lower voltage.
The LDO and its associated reference circuitry must
remain active when the device is in Sleep mode. The
PIC16(L)F1783 allows the user to optimize the
operating current in Sleep, depending on the
application requirements.
A Low-Power Sleep mode can be selected by setting
the VREGPM bit of the VREGCON register. With this
bit set, the LDO and reference circuitry are placed in a
low-power state when the device is in Sleep.
9.2.1
SLEEP CURRENT VS. WAKE-UP
TIME
In the default operating mode, the LDO and reference
circuitry remain in the normal configuration while in
Sleep. The device is able to exit Sleep mode quickly
since all circuits remain active. In Low-Power Sleep
mode, when waking up from Sleep, an extra delay time
is required for these circuits to return to the normal con-
figuration and stabilize.
The Low-Power Sleep mode is beneficial for applica-
tions that stay in Sleep mode for long periods of time.
The normal mode is beneficial for applications that
need to wake from Sleep quickly and frequently.
9.2.2
PERIPHERAL USAGE IN SLEEP
Some peripherals that can operate in Sleep mode will
not operate properly with the Low-Power Sleep mode
selected. The LDO will remain in the normal power
mode when those peripherals are enabled. The
Low-Power Sleep mode is intended for use with these
peripherals:
Brown-Out Reset (BOR)
Watchdog Timer (WDT)
External interrupt pin/Interrupt-on-change pins
Timer1 (with external clock source)
Note:
The PIC16LF1782 does not have a con-
figurable
Low-Power
Sleep
mode.
PIC16LF1782 is an unregulated device
and is always in the lowest power state
when in Sleep, with no wake-up time pen-
alty. This device has a lower maximum
VDD
and
I/O
voltage
than
the
PIC16(L)F1783. See Section 29.0 “Elec-
trical Specifications” for more informa-
tion.
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