參數(shù)資料
型號： KSZ8895MQ
廠商： Micrel Inc
文件頁數(shù)： 53/119頁
文件大?。?/td> 0K
描述： IC ETHERNET SW 5PORT 128-PQFP
標準包裝： 66
控制器類型： 以太網(wǎng)開關(guān)控制器
接口： MII
電源電壓： 1.8V，2.5V，3.3V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 128-BFQFP
供應(yīng)商設(shè)備封裝： 128-PQFP（14x20）
包裝： 托盤
配用： 576-3871-ND - BOARD EVALUATION FOR KSZ8895MQ
其它名稱： 576-3753
Micrel, Inc.
KSZ8895MQ/RQ/FMQ
Port 5 MAC 5 SW5-MII Interface for the KSZ8895MQ/FMQ
Table 4 shows two connection manners:
1.
The first is an external MAC connects to SW5-MII PHY mode.
2.
The second is an external PHY connects to SW5-MII MAC mode.
Please see the pin [91, 86, 87] descriptions for configuration details for the MAC mode and PHY mode. SW5-MII
works with 25MHz clock for 100Base-TX, SW5-MII works with 2.5MHz clock for 10Base-T.
KSZ8895MQ/RQ/FMQ PHY Mode Connection
KSZ8895MQ/RQ/FMQ MAC Mode Connection
External MAC
KSZ8895MQ/RQ/FMQ
SW5-MII Signals
Type
Description
External
PHY
KSZ8895MQ/RQ/FMQ
SW5-MII Signals
Type
MTXEN
SMTXEN
Input
Transmit enable
MTXEN
SMRXDV
Output
MTXER
SMTXER
Input
Transmit error
MTXER
Not used
MTXD3
SMTXD[3]
Input
Transmit data bit 3
MTXD3
SMRXD[3]
Output
MTXD2
SMTXD[2]
Input
Transmit data bit 2
MTXD2
SMRXD[2]
Output
MTXD1
SMTXD[1]
Input
Transmit data bit 1
MTXD1
SMRXD[1]
Output
MTXD0
SMTXD[0]
Input
Transmit data bit 0
MTXD0
SMRXD[0]
Output
MTXC
SMTXC
Output
Transmit clock
MTXC
SMRXC
Input
MCOL
SCOL
Output
Collision detection
MCOL
SCOL
Input
MCRS
SCRS
Output
Carrier sense
MCRS
SCRS
Input
MRXDV
SMRXDV
Output
Receive data valid
MRXDV
SMTXEN
Input
MRXER
Not used
Output
Receive error
MRXER
SMTXER
Input
MRXD3
SMRXD[3]
Output
Receive data bit 3
MRXD3
SMTXD[3]
Input
MRXD2
SMRXD[2]
Output
Receive data bit 2
MRXD2
SMTXD[2]
Input
MRXD1
SMRXD[1]
Output
Receive data bit 1
MRXD1
SMTXD[1]
Input
MRXD0
SMRXD[0]
Output
Receive data bit 0
MRXD0
SMTXD[0]
Input
MRXC
SMRXC
Output
Receive clock
MRXC
SMTXC
Input
Table 4. Switch MAC5 MII Signals
The switch MII interface operates in either MAC mode or PHY mode for KSZ8895MQ/RQ/FMQ. These interfaces are
nibble-wide data interfaces, so they run at one-quarter the network bit rate (not encoded). Additional signals on the
transmit side indicate when data is valid or when an error occurs during transmission. Likewise, the receive side has
indicators that convey when the data is valid and without physical layer errors. For half-duplex operation, there is a
signal that indicates a collision has occurred during transmission.
Note that the signal MRXER is not provided on the MII-SW interface for PHY mode operation and the signal MTXER
is not provided on the SW-MII interface for MAC mode operation. Normally MRXER would indicate a receive error
coming from the physical layer device. MTXER would indicate a transmit error from the MAC device. These signals
are not appropriate for this configuration. For PHY mode operation with an external MAC, if the device interfacing
with the KSZ8895MQ/RQ/FMQ has an MRXER pin, it should be tied low. For MAC mode operation with an external
PHY, if the device interfacing with the KSZ8895MQ/RQ/FMQ has an MTXER pin, it should be tied low.
March 12, 2014
39
Revision 1.7
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KSZ8895MQXCA 功能描述:Ethernet Switch 10/100 Base-T/TX I2C, SPI Interface 128-PQFP (14x20) 制造商:microchip technology 系列:- 包裝:托盤 零件狀態(tài):有效 協(xié)議:以太網(wǎng) 功能:開關(guān) 接口:I2C，SPI 標準:10/100 Base-T/TX 電壓 - 電源:1.8V，2.5V，3.3V 電流 - 電源:129mA 工作溫度:0°C ~ 70°C 封裝/外殼:128-BFQFP 供應(yīng)商器件封裝:128-PQFP（14x20） 標準包裝:66
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