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參數(shù)資料
| 型號： | KL5KUSB201 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | USB2.0 Compliant Transceiver Chip |
| 中文描述： | USB2.0標(biāo)準(zhǔn)收發(fā)器芯片 |
| 文件頁數(shù)： | 5/21頁 |
| 文件大?。?/td> | 183K |
| 代理商： | KL5KUSB201 |
Kawasaki USB device
KL5KUSB201
Datasheet (digest)
rev 1.1E page
5/21
Copyright 2002 Kawasaki Microelectronics Inc. Kawasaki LSI Inc. All rights reserved.
1.
Overview
Kawasaki Microelectronics Inc. and Kawasaki LSI Inc. introduce KL5KUSB201 LSI,
which is designed based on USB Specification revision 2.0 and operates as both
USB2.0 High Speed and Full Speed transceiver chip. It has two modes – UTMI
Specification compatible mode and Kawasaki Original mode. In Kawasaki Original
mode, the LSI has several convenient function such as automatic CRC generation and
verification, transmit packet abortion and automatic test packet generation for High
Speed Signal Quality test. The LSI is recognized as USB2.0 PHY chip and customers
are able to build up USB2.0 compliant device system with their logic and PHY control /
endpoint buffer function (SIE), which is available by Kawasaki or other IP vendor.
Figure 1. KL5KUSB201 Image
1.1 Chip Functionality
KL5KUSB201 Fucntionality is summarized below.
1. HS Chirp Signal Generation and Detection
2. Support for both High Speed (480Mbit/sec) and Full Speed (12Mbit/sec)
3. For received packet, phase lock, buffering, SYNC detection, NRZI decode, bit
un-stuffing, CRC error detection (optional), serial to parallel conversion are
performed. 16bit data is drived on SIE bus
4.For packet transmission, parallel 16bit data is received, serialized, CRC
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