參數(shù)資料
型號(hào): KAI-1020-ABB-JB-AE
廠商: KODAK IMAGE SENSOR SOLUTIONS
元件分類: CCD Image Sensor
英文描述: IMAGE SENSOR-CCD, 1000(H) X 1000(V) PIXEL, 500mV, SQUARE, THROUGH HOLE MOUNT
封裝: PGA-68
文件頁數(shù): 24/72頁
文件大?。?/td> 3212K
代理商: KAI-1020-ABB-JB-AE
T
V
0
5
0
5
φH1S
φH2S
0
φV1
CCD
T
VCCD
T
P
5
0
5
0
5
φV2A
φV2B
When the φV2A and φV1 timing inputs are pulsed, charge
in every pixel of the VCCD is shifted one row towards the
HCCD. The last row next to the HCCD is shifted into the
CCD. When the VCCD is shifted, the timing signals to
the HCCD must be stopped. φH1S must be stopped in the
high state and φH2S must be stopped in the low state.
The HCCD clocking may begin TVCCD μs after the falling
edge of the φV2A and φV1 pulse. The timing inputs to the
CDS should run continuously through the horizontal line
timing.
The HCCD has a total of 1036 pixels. The 1028 vertical
shift registers (columns) are shifted into the center 1028
pixels of the HCCD. There are 8 pixels at both ends of the
HCCD which receive no charge from a vertical shift
register. The first 8 clock cycles of the HCCD will be
empty pixels (containing no electrons). The next 12 clock
cycles will contain only electrons generated by dark
current in the VCCD and photodiodes. The next 1004
clock cycles will contain photo-electrons (image data).
Finally, the last 12 clock cycles will contain only
electrons generated by dark current in the VCCD and
photodiodes. Of the 12 dark columns, the first and last
dark columns should not be used for determining the
zero signal level. Some light does leak into the first
last dark columns. Only use the center 10 columns o
12 column dark reference.
When the HCCD is shifting valid image data, the timing
inputs to the electronic shutter driver (φSH), VCCD driver
(φV2A, φV2B, φV1), and fast dump drivers (φFD) should be
held at the low level. This prevents unwanted noise from
being introduced into the CDS circuit.
The HCCD is a type of charge coupled device known as a
pseudo-two phase CCD. This type of CCD has the ability
to shift charge in two directions. This allows the entire
image to be shifted out to the video 1 output CDS, or to
the video 2 output CDS (left/right image reversal). The
HCCD is split into two equal halves of 522 pixels each.
When operating the sensor in single output mode the two
halves of the HCCD are shifted in the same direction.
When operating the sensor in dual output mode the two
halves of the HCCD are shifted in opposite directions.
The direction of charge transfer in each half is controlled
by the φH1BL, φH2BL, φH1BR, and φH2BR timing inputs.
H
and
f the
Eastman Kodak Company, 2007
www.kodak.com/go/imagers
Revision 5.0 MTD/PS-0205 p30
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PDF描述
KAI-16000-AAA-JD-AE IMAGE SENSOR-CCD, 4872(H) X 3248(V) PIXEL, RECTANGULAR, THROUGH HOLE MOUNT
KAI-2001-AAA-CF-BA IMAGE SENSOR-CCD, 1600(H) X 1200(V) PIXEL, RECTANGULAR, THROUGH HOLE MOUNT
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