參數(shù)資料
型號: K4S281633D-N75
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 8Mx16 SDRAM 54CSP
中文描述: 8M × 16位SDRAM的54CSP
文件頁數(shù): 10/10頁
文件大?。?/td> 71K
代理商: K4S281633D-N75
K4S281633D-RL(N)
Rev. 0.6 Nov. 2001
CMOS SDRAM
Preliminary
Normal MRS Mode
Test Mode
CAS Latency
Burst Type
Burst Length
A8
A7
Type
A6
A5
A4
Latency
A3
Type
A2
A1
A0
BT=0
BT=1
0
0
Mode Register Set
0
0
0
Reserved
0
Sequential
0
0
0
1
1
0
1
Reserved
0
0
1
1
1
Interleave
0
0
1
2
2
1
0
Reserved
0
1
0
2
Mode Select
0
1
0
4
4
1
1
Reserved
0
1
1
3
BA1
BA0
Mode
0
1
1
8
8
Write Burst Length
1
0
0
Reserved
0
0
Setting
for Nor-
mal MRS
1
0
0
Reserved
Reserved
A9
Length
1
0
1
Reserved
1
0
1
Reserved
Reserved
0
Burst
1
1
0
Reserved
1
1
0
Reserved
Reserved
1
Single Bit
1
1
1
Reserved
1
1
1
Full Page
Reserved
Full Page Length : 256(x16)
MODE REGISTER FIELD TABLE TO PROGRAM MODES
Register Programmed with Normal MRS
Address
BA0 ~ BA1
*1
A11 ~ A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
Function
"0" Setting for
Normal MRS
RFU
W.B.L
Test Mode
CAS Latency
BT
Burst Length
1. Apply power and start clock, Attempt to maintain CKE= "H", DQM= "H" and the other pins are NOP condition at the inputs.
2. Power is applied to VDD and VDDQ (simultaneously).
3. Maintain stable power, stable clock and NOP input condition for a minimum of 200us.
4. Issue precharge commands for all banks of the devices.
5. Issue 2 or more auto-refresh commands.
6. Issue a mode register set command to initialize the mode register.
Note :
1. In order to assert normal MRS, BA0 and BA1 should set "0" absolutely.
Power Up Sequence
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