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| 型號： | JZ48F4L0QBY |
| 廠商： | Intel Corp. |
| 英文描述： | StrataFlash Wireless Memory |
| 中文描述： | 無線的StrataFlash存儲器 |
| 文件頁數(shù)： | 75/106頁 |
| 文件大?。?/td> | 1272K |
| 代理商： | JZ48F4L0QBY |
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Intel StrataFlash Wireless Memory (L18)
Datasheet
Intel StrataFlash Wireless Memory (L18)
Order Number: 251902, Revision: 009
April 2005
75
15.0
Special Read States
The following sections describe non-array read states. Non-array reads can be performed in
asynchronous read or synchronous burst mode. A non-array read operation occurs as asynchronous
single-word mode. When non-array reads are performed in asynchronous page mode only the first
data is valid and all subsequent data are undefined. When a non-array read operation occurs as
synchronous burst mode, the same word of data requested will be output on successive clock edges
until the burst length requirements are satisfied.
Each partition can be in one of its read states independent of other partitions’ modes. See
Figure 11,
“Asynchronous Single-Word Read with ADV# Low” on page 33
and
Figure 14, “Synchronous
Single-Word Array or Non-array Read Timing” on page 35
for details.
15.1
Read Status Register
The status of any partition is determined by reading the Status Register from the address of that
particular partition. To read the Status Register, issue the Read Status Register command within the
desired partition’s address range. Status Register information is available at the partition address to
which the Read Status Register, Word Program, or Block Erase command was issued. Status
Register data is automatically made available following a Word Program, Block Erase, or Block
Lock command sequence. Reads from a partition after any of these command sequences outputs
that partition’s status until another valid command is written to that partition (e.g. Read Array
command).
The Status Register is read using single asynchronous-mode or synchronous burst mode reads.
Status Register data is output on DQ[7:0], while 0x00 is output on DQ[15:8]. In asynchronous
mode the falling edge of OE#, or CE# (whichever occurs first) updates and latches the Status
Register contents. However, reading the Status Register in synchronous burst mode, CE# or ADV#
must be toggled to update status data. The Status Register read operations do not affect the read
state of the other partitions.
The Device Write Status bit (SR[7]) provides overall status of the device. The Partition Status bit
(SR[0]) indicates whether the addressed partition or some other partition is actively programming
or erasing. Status register bits SR[6:1] present status and error information about the program,
erase, suspend, V
PP
, and block-locked operations.
Table 16.
Status Register Description (Sheet 1 of 2)
Status Register (SR)
Default Value = 0x80
Device
Write Status
Erase
Suspend
Status
Erase
Status
Program
Status
V
PP
Status
Program
Suspend
Status
Block-
Locked
Status
Partition
Status
DWS
ESS
ES
PS
VPPS
PSS
BLS
PWS
7
6
5
4
3
2
1
0
Bit
Name
Description
7
Device Write Status
(DWS)
0 = Device is busy; program or erase cycle in progress; SR[0] valid.
1 = Device is ready; SR[6:1] are valid.
6
Erase Suspend Status
(ESS)
0 = Erase suspend not in effect.
1 = Erase suspend in effect.
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