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參數(shù)資料
| 型號： | ISPPAC-CLK5510V-01TN48C |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | Backlight LED; Color:Infrared; Digit/Alpha Height:85mm; Forward Current:500mA; Operating Temperature Range:0 C to +50 C; Leaded Process Compatible:No; Light Emitting Area:85x220mm; Peak Reflow Compatible (260 C):No |
| 中文描述： | 5500 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48 |
| 封裝： | LEAD FREE, TQFP-48 |
| 文件頁數(shù)： | 23/43頁 |
| 文件大?。?/td> | 867K |
| 代理商： | ISPPAC-CLK5510V-01TN48C |
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Lattice Semiconductor
ispClock5500 Family Data Sheet
23
loads and to the
≈
20
setting for driving HSTL. The far end of the transmission line must be terminated to an
appropriate VTT voltage through a 50
resistor.
Figure 20. Configuration for SSTL2, SSTL3, and HSTL Output Modes
When driving differential SSTL or HSTL loads, the above con
fi
guration should be duplicated on the ‘-’ output line of
the differential pair.
Figure 21 shows a typical con
fi
guration for the ispClock5500’s output driver when con
fi
gured to drive LVDS or dif-
ferential LVPECL loads. The ispClock5500’s output impedance is disengaged when the driver is set to LVDS or
LVPECL mode. The far end of the transmission line must be terminated with a 100
resistor across the two signal
lines.
Figure 21. Configuration for LVDS and LVPECL Output Modes
Note that when in LVPECL output mode, the ispClock5500’s output driver provides an internal pull-down, unlike a
typical bipolar LVPECL driver. For this reason no external pull-down resistors are necessary and the driver may be
terminated with a single 100
resistor across the signal lines. For proper operation, pull-down resistors should
NOT be used with the ispClock5500’s LVPECL output mode.
Thermal Management
In applications where a majority of the ispClock5510 or ispClock5520’s outputs are active and operating at or near
maximum output frequency (320 MHz), package thermal limitations may need to be considered to ensure a suc-
cessful design. Thermal characteristics of the packages employed by Lattice Semiconductor may be found in the
document
Thermal Management
which may be obtained at www.latticesemi.com.
The maximum current consumption of the digital and analog core circuitry is approximately 157mA worst case
(I
CCD
+ I
CCA
), and each of the output banks may draw up to 35mA worst case (LVCMOS 3.3V, CL=18pF, f
OUT
=320
MHz, both outputs in each bank enabled). This results in a total device dissipation:
P
DMAX
= 3.3V x (10 x 35mA + 157mA) = 1.67W
(3)
Zo=50
Ro : 40
(SSTL)
≈
20
(HSTL)
ispClock5500
SSTL/HSTL
Mode
SSTL/HSTL
Receiver
VTT
VREF
RT=50
Zo=50
ispClock5500
LVDS/LVPECL
mode
LVDS/PECL
Receiver
RT=100
Zo=50
相關PDF資料 |
PDF描述 |
|---|---|
| ISPPAC-CLK5510V-01TN48I | LED Area Light; Forward Current:300mA; Operating Temperature Range:0 C to +50 C; LED Color:Red; Leaded Process Compatible:No; Light Emitting Area:80x80mm; Peak Reflow Compatible (260 C):No; Supply Current:250mA |
| ISPPAC-CLK5610V-01T100I | Linear Array Light; LED Color:Blue; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Supply Current:1.6A; Supply Voltage:24VDC; Wavelength:470nm |
| ISPCLOCK5600 | In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer |
| ISPPAC-CLK5610V-01T100C | In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer |
| ISPPAC-CLK5620V-01T100C | LED Area Light; LED Color:Blue; Leaded Process Compatible:No; Light Emitting Area:80x80mm; Peak Reflow Compatible (260 C):No; Supply Current:250mA; Supply Voltage:24VDC; Wavelength:470nm |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ISPPACCLK5510V-01TN48C | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Clock Generator with Universal Fan-Out Buffer |
| ISPPAC-CLK5510V-01TN48I | 功能描述:時鐘驅(qū)動器及分配 PROGRAMMABLE CLOCK GENERATOR RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| ISPPACCLK5510V-01TN48I | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Clock Generator with Universal Fan-Out Buffer |
| ISPPAC-CLK5520V-01T100C | 功能描述:時鐘驅(qū)動器及分配 PROGRAMMABLE CLOCK GENERATOR RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| ISPPACCLK5520V-01T100C | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Clock Generator with Universal Fan-Out Buffer |
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