參數(shù)資料
型號: ISPL1048E-90LT
廠商: Lattice Semiconductor Corporation
英文描述: High-Density Programmable Logic
中文描述: 高密度可編程邏輯
文件頁數(shù): 3/16頁
文件大小: 158K
代理商: ISPL1048E-90LT
Specifications
ispLSI 1048E
3
Absolute Maximum Ratings
1
Supply Voltage V
cc
. ................................. -0.5 to +7.0V
Input Voltage Applied........................ -2.5 to V
CC
+1.0V
Off-State Output Voltage Applied ..... -2.5 to V
CC
+1.0V
Storage Temperature................................ -65 to 150
°
C
Case Temp. with Power Applied .............. -55 to 125
°
C
Max. Junction Temp. (T
J
) with Power Applied ... 150
°
C
1. Stresses above those listed under the “Absolute Maximum Ratings” may cause permanent damage to the device. Functional
operation of the device at these or at any other conditions above those indicated in the operational sections of this specification
is not implied (while programming, follow the programming specifications).
DC Recommended Operating Conditions
Capacitance (T
A
=25
o
C, f=1.0 MHz)
Data Retention Specifications
C
C
SYMBOL
Table 2-0006/1048E
PARAMETER
Y0 Clock Capacitance
15
UNITS
pf
TYPICAL
8
TEST CONDITIONS
V = 5.0V, V = 2.0V
1
2
Dedicated Input, I/O, Y1, Y2, Y3, Clock Capacitance
pf
V = 5.0V, V = 2.0V
T
A
= 0
°
C to + 70
°
C
T
A
= -40
°
C to + 85
°
C
SYMBOL
Table 2-0005/1048E
V
CC
V
IH
V
IL
PARAMETER
Supply Voltage
Input High Voltage
Input Low Voltage
MIN.
MAX.
UNITS
4.75
4.5
2.0
0
5.25
5.5
V
cc
+1
0.8
V
V
V
V
Commercial
Industrial
Table 2-0008/1048E
PARAMETER
Data Retention
Erase/Reprogram Cycles
MINIMUM
20
10000
MAXIMUM
UNITS
Years
Cycles
相關(guān)PDF資料
PDF描述
ISPL1048E-90LTI High-Density Programmable Logic
ISP1048E High-Density Programmable Logic
ISPLSI1016EA-100LJ44 In-System Programmable High Density PLD
ISPLSI1016EA-100LT44 In-System Programmable High Density PLD
ISPLSI1016EA-125LJ44 In-System Programmable High Density PLD
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