參數(shù)資料
型號(hào)： ISPGDX160VA-7B208
廠商： LATTICE SEMICONDUCTOR CORP
元件分類： PLD
英文描述： In-System Programmable 3.3V Generic Digital CrosspointTM
中文描述： EE PLD, 7 ns, PBGA208
封裝： FBGA-208
文件頁數(shù)： 7/37頁
文件大?。?/td> 464K
代理商： ISPGDX160VA-7B208
7
Specifications
ispGDX160V/VA
Figure 6. Data Bus Byte Swapper
Figure 7. Four-Port Memory Interface
C
D
D
OEA OEB
I/OA
D0-7
D8-15
D8-15
D0-7
I/OB
XCVR
OEA OEB
I/OA
I/OB
XCVR
OEA OEB
I/OA
I/OB
XCVR
OEA OEB
I/OA
I/OB
XCVR
B
B
B
B
Port #1
OE1
Memory
Port
OEM
SEL0
SEL1
To
Memory
Port #2
OE2
Port #3
OE3
Note: All OE and SEL lines driven by external arbiter logic (not shown).
Port #4
OE4
4-to-1
16-Bit MUX
Bidirectional
Figure 5. Address Demultiplex/Data Buffering
C
M
D
Q
CLK
OEA
OEB
I/OA
I/OB
Address
Buffered
Data
To Memory/
Peripherals
XCVR
Address
Latch
Applications (Continued)
Designing with the ispGDXV/VA
As mentioned earlier, this architecture satisfies the PRSI
class of applications without restrictions: any I/O pin as a
single input or bidirectional can drive any other I/O pin as
output.
For the case of PDP applications, the designer does have
to take into consideration the limitations on pins that can
be used as control (MUX0, MUX1, OE, CLK) or data
(MUXA-D) inputs. The restrictions on control inputs are
not likely to cause any major design issues because the
input possibilities span 25% of the total pins.
The MUXA-D input partitioning requires that designers
consciously assign pinouts so that MUX inputs are in the
appropriate, disjoint groups. For example, since the
MUXA group includes I/O0-39 (160 I/O device), it is not
possible to use I/O0 and I/O9 in the same MUX function.
As previously discussed, data path functions will be
assigned early in the design process and these restric-
tions are reasonable in order to optimize speed and cost.
User Electronic Signature
The ispGDXV/VA Family includes dedicated User Elec-
tronic Signature (UES) E
2
CMOS storage to allow users
to code design-specific information into the devices to
identify particular manufacturing dates, code revisions,
or the like. The UES information is accessible through
the boundary scan programming port via a specific com-
mand. This information can be read even when the
security cell is programmed.
Security
The ispGDXV/VA Family includes a security feature that
prevents reading the device program once set. Even
when set, it does not inhibit reading the UES or device ID
code. It can be erased only via a device bulk erase.
相關(guān)PDF資料
PDF描述
ISPGDX160VA-3B208 In-System Programmable 3.3V Generic Digital CrosspointTM
ISPGDX160VA-3B272 In-System Programmable 3.3V Generic Digital CrosspointTM
ISPGDX160VA-3Q208 In-System Programmable 3.3V Generic Digital CrosspointTM
ISPGDX160VA-5B208 In-System Programmable 3.3V Generic Digital CrosspointTM
ISPGDX160VA-5B208I In-System Programmable 3.3V Generic Digital CrosspointTM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISPGDX160VA7B208-9I 制造商:Lattice Semiconductor Corporation 功能描述:
ISPGDX160VA-7B208I 功能描述:模擬和數(shù)字交叉點(diǎn) IC PROGRAMMABLE GEN DIG CROSSPOINT RoHS:否 制造商:Micrel 配置:2 x 2 封裝 / 箱體:MLF-16 數(shù)據(jù)速率:10.7 Gbps 輸入電平:CML, LVDS, LVPECL 輸出電平:CML 電源電壓-最大:3.6 V 電源電壓-最小:2.375 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 產(chǎn)品:Digital Crosspoint 封裝:Tube
ISPGDX160VA-7B272 功能描述:模擬和數(shù)字交叉點(diǎn) IC PROGRAMMABLE GEN DIG CROSSPOINT RoHS:否 制造商:Micrel 配置:2 x 2 封裝 / 箱體:MLF-16 數(shù)據(jù)速率:10.7 Gbps 輸入電平:CML, LVDS, LVPECL 輸出電平:CML 電源電壓-最大:3.6 V 電源電壓-最小:2.375 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 產(chǎn)品:Digital Crosspoint 封裝:Tube
ISPGDX160VA-7B272I 功能描述:模擬和數(shù)字交叉點(diǎn) IC PROGRAMMABLE GEN DIG CROSSPOINT RoHS:否 制造商:Micrel 配置:2 x 2 封裝 / 箱體:MLF-16 數(shù)據(jù)速率:10.7 Gbps 輸入電平:CML, LVDS, LVPECL 輸出電平:CML 電源電壓-最大:3.6 V 電源電壓-最小:2.375 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 產(chǎn)品:Digital Crosspoint 封裝:Tube
ISPGDX160VA-7BN208 功能描述:模擬和數(shù)字交叉點(diǎn) IC PROGRAMMABLE GEN DIG CROSSPOINT RoHS:否 制造商:Micrel 配置:2 x 2 封裝 / 箱體:MLF-16 數(shù)據(jù)速率:10.7 Gbps 輸入電平:CML, LVDS, LVPECL 輸出電平:CML 電源電壓-最大:3.6 V 電源電壓-最小:2.375 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 產(chǎn)品:Digital Crosspoint 封裝:Tube
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