參數(shù)資料
型號: ISP1520BD
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Hi-Speed Universal Serial Bus hub controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁數(shù): 16/51頁
文件大?。?/td> 259K
代理商: ISP1520BD
Philips Semiconductors
ISP1520
Hi-Speed USB hub controller
Product data
Rev. 02 — 04 May 2004
16 of 51
9397 750 11689
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
I
2
C-bus address:
The address of the ISP1520 is given in
Table 10
.
9.2.2
Architecture of configurable hub descriptors
The configurable hub descriptors can be masked in the internal ROM memory; see
Figure 7
. These descriptors can also be supplied from an external EEPROM or a
microcontroller. The ISP1520 implements both the master and slave I
2
C-bus
controllers. The information from the external EEPROM or the microcontroller is
transferred into the internal RAM during the power-on reset. A signature word is used
to identify correct descriptors. If the signature matches, the content of the RAM is
chosen instead of the ROM.
When the external microcontroller mode is selected and while the external
microcontroller is writing to the internal RAM, any request to configurable descriptors
will be responded to with a Not AcKnowledge (NAK). There is no specified time-out
period for the NAK signal. This data is then passed to the host during the
enumeration process.
The three configuration methods are selected by connecting pins SCL and SDA in the
manner given in
Table 11
.
Table 10:
I
2
C-bus slave address
MSB
A7
0
Slave address
A4
1
LSB
A1
0
Bit
Value
A6
0
A5
1
A3
0
A2
1
R/W
0/1
The I
2
C-bus cannot be shared between the EEPROM and the external microcontroller.
Fig 7.
Configurable hub descriptors.
MLD711
MICROCONTROLLER
SERIAL EEPROM
MASTER/SLAVE
I
2
C-BUS INTERFACE
signature
match
RAM
(256 bytes)
DESCRIPTOR
GENERATOR
INTERFACE
ROM
(256 bytes)
MUX
HUB CORE
I
2
C-bus
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