- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360998 > ISP1181B (NXP Semiconductors N.V.) Full-speed Universal Serial Bus peripheral controller PDF資料下載
參數(shù)資料
| 型號： | ISP1181B |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Full-speed Universal Serial Bus peripheral controller |
| 中文描述： | 全速通用串行總線外設控制器 |
| 文件頁數(shù)： | 22/70頁 |
| 文件大?。?/td> | 341K |
| 代理商： | ISP1181B |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁當前第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁
Philips Semiconductors
ISP1181B
Full-speed USB peripheral controller
Product data
Rev. 02 — 07 December 2004
22 of 70
9397 750 13958
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
11.2 Resume conditions
A wake-up from the suspend state is initiated either by the USB host or by the
application:
USB host
: drives a K-state on the USB bus (global resume)
Application
: remote wake-up through a HIGH level on input WAKEUP or a LOW
level on input CS (if enabled using bit WKUPCS in the Hardware Configuration
register). Wake-up on CS will work only if V
BUS
is present.
The steps of a wake-up sequence are as follows:
1. The internal oscillator and the PLL multiplier are re-enabled. When stabilized, the
clock signals are routed to all internal circuits of the ISP1181B.
2. The SUSPEND output is deasserted, and bit RESUME in the Interrupt register is
set. This will generate an interrupt if bit IERESM in the Interrupt Enable register is
set.
3. Maximum 15 ms after starting the wake-up sequence, the ISP1181B resumes its
normal functionality.
4. In case of a remote wake-up, the ISP1181B drives a K-state on the USB bus for
10 ms.
5. Following the deassertion of output SUSPEND, the application restores itself and
other system components to the normal operating mode.
6. After wake-up, the internal registers of the ISP1181B are write-protected to
prevent corruption by inadvertent writing during power-up of external
components. The firmware must send an Unlock Device command to the
ISP1181B to restore its full functionality.
11.3 Control bits in suspend and resume
Fig 7.
SUSPEND and WAKEUP signals in a powered-off modem application.
WAKEUP
8031
RST
RING DETECTION
ISP1181B
DP
DM
USB
VBUS
VBUS
VCC
LINE
004aaa672
SUSPEND
Table 12:
Register
Interrupt
Summary of control bits
Bit
SUSPND
BUSTATUS
Function
a transition from awake to the suspend state was detected
monitors USB bus status (logic 1 = suspend); used when
interrupt is serviced
a transition from suspend to the resume state was detected
RESUME
相關PDF資料 |
PDF描述 |
|---|---|
| ISP1181BBS | Full-speed Universal Serial Bus peripheral controller |
| ISP1181BDGG | Full-speed Universal Serial Bus peripheral controller |
| ISP1181 | Full-speed Universal Serial Bus Interface Device(全速通用串行總線接口器件) |
| ISP1181DGG | INDUCTOR 4.7NH +-.3NH 0402 SMD |
| ISP1183 | Low-power Universal Serial Bus interface device with DMA |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ISP1181BBS | 制造商:NXP Semiconductors 功能描述:IC CONTROLLER USB PERIPHERAL SMD 制造商:ST-Ericsson 功能描述:CONTROLLER USB PERIPHERAL 48HVQFN |
| ISP1181BBS,518 | 功能描述:USB 接口集成電路 USB 1.1 DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1181BBS,551 | 功能描述:USB 接口集成電路 USB 1.1 DEVICE CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1181BBS,557 | 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1181BBS518 | 制造商:ST-Ericsson 功能描述:CONTROLLER USB PERIPHERAL 48HVQFN |
發(fā)布緊急采購，3分鐘左右您將得到回復。