參數(shù)資料
型號: ISP1130DL
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Universal Serial Bus compound hub with integrated keyboard controller
中文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PDSO56
封裝: PLASTIC, SSOP-56
文件頁數(shù): 25/68頁
文件大小: 1786K
代理商: ISP1130DL
Philips Semiconductors
ISP1130
USB compound hub with keyboard controller
Objective specification
Rev. 01 — 23 March 2000
25 of 68
9397 750 06895
Philips Electronics N.V. 2000. All rights reserved.
9.1.3
Set Mode command
Selects the operating mode and (de)activates features. The command is followed by
one data write, containing the Configuration byte.
Code (Hex) —
F3
Transaction —
write 1 byte (Configuration).
9.2 Data flow commands
Data flow commands are used to manage the data transmission between the USB
endpoints and the embedded microcontroller. Much of the data flow is initiated via an
interrupt to the microcontroller. The data flow commands are used to access the
endpoints and determine whether the endpoint FIFOs contain valid data.
Remark:
The IN buffer of an endpoint contains input data
for
the host, the OUT buffer
receives output data
from
the host.
9.2.1
Read Interrupt Register command
Shows the source(s) of an interrupt to the microcontroller. After writing the command,
two bytes are read which hold the interrupt register contents. Byte 1 contains the
least significant bits (7 to 0), byte 2 the most significant bits (15 to 8).
Code (Hex) —
F4
Transaction —
read 2 bytes.
Table 25: Set Mode command, Configuration byte: bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
-
Clock
Restart
String
Descriptor
Enable
0
W
Remote
WakeUp
Enable
0
W
Always
PLL
Clock
0
W
Use
IntDn
Resistor
0
W
-
Interrupt
OnNAK
Reset
Access
X
W
0
W
0
W
1
W
Table 26: Set Mode command, Configuration byte: bit description
Bit
Symbol
7
-
6
ClockRestart
Description
reserved
A logic 1 will cause a clock restart for 2 ms upon a bus transition, when the device
is in ‘suspend’ mode. This allows the device to wake up without resume signaling.
A logic 1 enables the string descriptor. The default string will be sent to the host
upon request.
A logic 1 enables remote wake-up by key press (embedded function 1).
A logic 1 indicates that the internal clocks and PLL are always running, even in
‘suspend’ mode. A logic 0 stops the internal clock, crystal oscillator and PLL.
A logic 1 causes the downstream pull-down resistors to be connected.
reserved; must always be logic 0
A logic 1 will generate an interrupt upon sending a NAK. A logic 0 will only report
successful transactions.
5
StringDescriptorEnable
4
3
RemoteWakeUpEnable
AlwaysPLLClock
2
1
0
UseIntDnResistor
-
InterruptOnNAK
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