- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄2002 > ISLA212P20IRZ (Intersil)IC ADC 12BIT SRL/SPI 72QFN PDF資料下載
參數(shù)資料
| 型號(hào)： | ISLA212P20IRZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 13/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT SRL/SPI 72QFN |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | FemtoCharge™ |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 200M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 468mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 72-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 72-QFN（10x10） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | * |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁當(dāng)前第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
ISLA212P
20
FN7717.2
November 30, 2012
Analog Input
A single, fully differential input (VINP/VINN) connects to the
sample-and-hold amplifier (SHA) of each unit A/D. The ideal
full-scale input voltage is 2.0V, centered at the VCM voltage of
0.94V, as shown in Figure 27.
Best performance is obtained when the analog inputs are driven
differentially. The common-mode output voltage, VCM, should be
used to properly bias the inputs, as shown in Figures 28
through 30. An RF transformer gives the best noise and
distortion performance for wideband and high intermediate
frequency (IF) inputs. Two different transformer input schemes
This dual transformer scheme is used to improve common-mode
rejection, which keeps the common-mode level of the input
matched to VCM. The value of the shunt resistor should be
determined based on the desired load impedance. The
differential input resistance of the ISLA212P is 600
Ω.
The SHA design uses a switched capacitor input stage (see
Figure 43), which creates current spikes when the sampling
capacitance is reconnected to the input voltage. This causes a
disturbance at the input, which must settle before the next
sampling point. Lower source impedance results in faster settling
and improved performance; therefore, a 2:1 or 1:1 transformer
and low shunt resistance are recommended for optimal
performance.
A differential amplifier, as shown in the simplified block diagram
in Figure 30, can be used in applications that require DC
coupling. In this configuration, the amplifier typically dominates
the achievable SNR and distortion performance. The new Intersil
ISL552xx differential amplifier family can also be used in certain
AC applications with minimal performance degradation. Contact
Intersil sales support with your needs.
Clock Input
The clock input circuit is a differential pair (see Figure 44).
Driving these inputs with a high level (up to 1.8VP-P on each
input) sine or square wave provides the lowest jitter
performance. A transformer with 4:1 impedance ratio provides
increased drive levels. The clock input is functional with
AC-coupled LVDS, LVPECL, and CML drive levels. To maintain the
lowest possible aperture jitter, a high slew rate at the zero
crossing of the differential clock input signal is recommended.
The recommended drive circuit is shown in Figure 31. A duty
range of 40% to 60% is acceptable. The clock can be driven
single-ended, but this reduces the edge rate and may affect SNR
performance. The clock inputs are internally self-biased to
AVDD/2 to facilitate AC coupling.
A selectable 2x or 4x frequency divider is provided in series with
the clock input. The divider can be used in the 2x mode with a
sample clock equal to twice the desired sample rate or in 4x
mode with a sample clock equal to four times the desired
sample rate. This allows the use of the Phase Slip feature, which
enables synchronization of multiple ADCs. The Phase Slip feature
can be used as an alternative to the CLKDIVRST pins to
synchronize ADCs in a multiple ADC system.
FIGURE 27. ANALOG INPUT RANGE
1.0
1.8
0.6
0.2
1.4
VINP
VINN
VCM
0.94V
1.0V
FIGURE 28. TRANSFORMER INPUT FOR GENERAL PURPOSE
APPLICATIONS
ADT1-1WT
0.1F
A/D
VCM
ADT1-1WT
1000pF
FIGURE 29. TRANSMISSION-LINE TRANSFORMER INPUT FOR
HIGH IF APPLICATIONS
A / D
VCM
1000pF
TX-2-5-1
ADTL1-12
FIGURE 30. DIFFERENTIAL AMPLIFIER INPUT
A/D
FIGURE 31. RECOMMENDED CLOCK DRIVE
TC4-19G2+
1000pF
CLKP
CLKN
0.01F
200
1000pF
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISLA214S50IR1Z | IC ADC |
| ISLA222P13IRZ | IC ADC 12BIT SRL/SPI 72QFN |
| ISLA224S25IR1Z | IC ADC |
| KAD2708C-27Q68 | IC ADC 8BIT 275MSPS PAR 68-QFN |
| KAD2708L-27Q68 | IC ADC 8BIT 275MSPS PAR 68-QFN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISLA212P25 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:12-Bit, 500MSPS ADC Programmable Built-in Test Patterns |
| ISLA212P25IRZ | 制造商:Intersil Corporation 功能描述:12-BIT 250MSPS ADC, 72-PIN QFN - Trays 制造商:Intersil Corporation 功能描述:IC ADC 12BIT SPI/SRL 250M 72QFN |
| ISLA212P50 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:12-Bit, 500MSPS ADC Programmable Built-in Test Patterns |
| ISLA212P50_1105 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:12-Bit, 500MSPS ADC Programmable Built-in Test Patterns |
| ISLA212P50IRZ | 制造商:Intersil Corporation 功能描述:12-BIT 500MSPS ADC, 72-PIN QFN - Bulk 制造商:Intersil 功能描述:Intersil ISLA212P50IRZ Analog to Digital Converters (ADC) 制造商:Intersil Corporation 功能描述:IC ADC 12BIT SRL/SPI 72QFN 制造商:Intersil 功能描述:12-BIT 500MSPS ADC 7 2-PIN |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。