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參數(shù)資料
| 型號(hào)： | ISL6610AIRZ |
| 廠商： | INTERSIL CORP |
| 元件分類： | MOSFETs |
| 英文描述： | Dual Synchronous Rectified MOSFET Drivers |
| 中文描述： | 4 A BUF OR INV BASED MOSFET DRIVER, PQCC16 |
| 封裝： | 4 X 4 MM, ROHS COMPLIANT, PLASTIC, MO-220VGGC, QFN-16 |
| 文件頁(yè)數(shù)： | 5/11頁(yè) |
| 文件大?。?/td> | 279K |
| 代理商： | ISL6610AIRZ |
5
FN6395.0
November 22, 2006
Functional Pin Description
UGATE Turn-On Propagation Delay
t
PDHU
Outputs Unloaded
-
18
-
ns
LGATE Turn-On Propagation Delay
t
PDHL
Outputs Unloaded
-
23
-
ns
Tri-state to UG/LG Rising Propagation Delay
t
PTS
Outputs Unloaded
-
20
-
ns
OUTPUT (Note 4)
Upper Drive Source Resistance
R
UG_SRC
250mA Source Current
-
1.0
2.5
Ω
Upper Drive Sink Resistance
R
UG_SNK
250mA Sink Current
-
1.0
2.5
Ω
Lower Drive Source Resistance
R
LG_SRC
250mA Source Current
-
1.0
2.5
Ω
Lower Drive Sink Resistance
R
LG_SNK
250mA Sink Current
-
0.4
1.0
Ω
NOTE:
4. Guaranteed by Characterization. Not 100% tested in production.
Electrical Specifications
These specifications apply for T
A
= -40°C to +85°C, unless otherwise noted
(Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
PACKAGE PIN #
PIN
SYMBOL
FUNCTION
SOIC
DFN
1
15
PWM1
The PWM signal is the control input for the Channel 1 driver. The PWM signal can enter three distinct states during
operation, see the Tri-state PWM Input section under DESCRIPTION for further details. Connect this pin to the PWM
output of the controller.
2
16
PWM2
The PWM signal is the control input for the Channel 2 driver. The PWM signal can enter three distinct states during
operation, see the Tri-state PWM Input section under DESCRIPTION for further details. Connect this pin to the PWM
output of the controller.
3
1
GND
Bias and reference ground. All signals are referenced to this node.
4
2
LGATE1
Lower gate drive output of Channel 1. Connect to gate of the low-side power N-Channel MOSFET.
5
3
PVCC
This pin supplies power to both the lower and higher gate drives. Place a high quality low ESR ceramic capacitor
from this pin to PGND.
6
4
PGND
Power ground return of both low gate drivers.
-
5,8
NC1,2
No connection.
7
6
LGATE2
Lower gate drive output of Channel 2. Connect to gate of the low-side power N-Channel MOSFET.
8
7
PHASE2
Connect this pin to the SOURCE of the upper MOSFET and the DRAIN of the lower MOSFET in Channel 2. This
pin provides a return path for the upper gate drive.
9
9
UGATE2
Upper gate drive output of Channel 2. Connect to gate of high-side power N-Channel MOSFET.
10
10
BOOT2
Floating bootstrap supply pin for the upper gate drive of Channel 2. Connect the bootstrap capacitor between this
pin and the PHASE2 pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. See the
Internal Bootstrap Device section under DESCRIPTION for guidance in choosing the capacitor value.
11
11
BOOT1
Floating bootstrap supply pin for the upper gate drive of Channel 1. Connect the bootstrap capacitor between this
pin and the PHASE1 pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. See the
Internal Bootstrap Device section under DESCRIPTION for guidance in choosing the capacitor value.
12
12
UGATE1
Upper gate drive output of Channel 1. Connect to gate of high-side power N-Channel MOSFET.
13
13
PHASE1
Connect this pin to the SOURCE of the upper MOSFET and the DRAIN of the lower MOSFET in Channel 1. This
pin provides a return path for the upper gate drive.
14
14
VCC
Connect this pin to a +5V bias supply. It supplies power to internal analog circuits. Place a high quality low ESR
ceramic capacitor from this pin to GND.
-
17
PAD
Connect this pad to the power ground plane (GND) via thermally enhanced connection.
ISL6610, ISL6610A
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