參數(shù)資料
型號(hào): ISL6568IRZ-T
廠(chǎng)商: INTERSIL CORP
元件分類(lèi): 穩(wěn)壓器
英文描述: Two-Phase Buck PWM Controller with Integrated MOSFET Drivers for VRM9, VRM10, and AMD Hammer Applications
中文描述: SWITCHING CONTROLLER, 275 kHz SWITCHING FREQ-MAX, PQCC32
封裝: 5 X 5 MM, ROHS COMPLIANT, PLASTIC, MO-220-VHHD, QFN-32
文件頁(yè)數(shù): 5/28頁(yè)
文件大小: 716K
代理商: ISL6568IRZ-T
5
FN9187.3
July 25, 2005
Absolute Maximum Ratings
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to +6V
Supply Voltage, PVCC. . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to +15V
Absolute Boot Voltage, V
BOOT
. . . . . . . .GND - 0.3V to GND + 36V
Phase Voltage, V
PHASE
. . . . . . . . GND - 0.3V to 15V (PVCC = 12)
GND - 8V (<400ns, 20μJ) to 24V (<200ns, V
BOOT-PHASE
= 12V)
Upper Gate Voltage, V
UGATE
. . . .V
PHASE
- 0.3V to V
BOOT
+ 0.3V
V
PHASE
- 3.5V (<100ns Pulse Width, 2μJ) to V
BOOT
+ 0.3V
Lower Gate Voltage, V
LGATE
. . . . . . . . GND - 0.3V to PVCC + 0.3V
GND - 5V (<100ns Pulse Width, 2μJ) to PVCC+ 0.3V
Input, Output, or I/O Voltage . . . . . . . . . GND - 0.3V to VCC + 0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . .Class I JEDEC STD
Recommended Operating Conditions
VCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V
±
5%
PVCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . .+5V to 12V
±
5%
Ambient Temperature (ISL6568CR, ISL6568CRZ) . . . . 0°C to 70°C
Ambient Temperature (ISL6568IR, ISL6568IRZ). . . . .-40°C to 85°C
Thermal Information
Thermal Resistance
QFN Package (Notes 1, 2). . . . . . . . . .
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150°C
Maximum Storage Temperature Range. . . . . . . . . . .-65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300°C
θ
JA
(°C/W)
35
θ
JC
(°C/W)
5
CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational section of this specification is not implied.
NOTES:
1.
θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. For
θ
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Specified.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
BIAS SUPPLY AND INTERNAL OSCILLATOR
Input Bias Supply Current
I
VCC
; ENLL = high
-
15
20
mA
Gate Drive Bias Current
I
PVCC
; ENLL = high
-
1.5
-
mA
VCC POR (Power-On Reset) Threshold
VCC Rising
4.25
4.38
4.50
V
VCC Falling
3.75
3.88
4.00
V
PVCC POR (Power-On Reset) Threshold
PVCC Rising
4.25
4.38
4.50
V
PVCC Falling
3.60
3.88
4.00
V
Oscillator Ramp Amplitude (Note 3)
V
PP
-
1.50
-
V
Maximum Duty Cycle (Note 3)
-
66.6
-
%
Oscillator Frequency, F
SW
R
T
= 100k
(
±
0.1%)
225
250
275
kHz
CONTROL THRESHOLDS
ENLL Rising Threshold
-
0.66
-
V
ENLL Hysteresis
-
100
-
mV
COMP Shutdown Threshold
COMP Falling
0.2
0.3
0.4
V
REFERENCE AND DAC
System Accuracy (VID = 1.0V - 1.850V)
-0.5
-
0.5
%
System Accuracy (VID = 0.8V - 1.0V)
-0.8
-
0.8
%
DAC Input Low Voltage (VR9, VR10)
-
-
0.4
V
DAC Input High Voltage (VR9, VR10)
0.8
-
-
V
DAC Input Low Voltage (AMD)
-
-
0.6
V
DAC Input High Voltage (AMD)
1.0
-
-
V
OFS Sink Current Accuracy (Negative Offset)
R
OFS
= 30k
from OFS to VCC
R
OFS
= 10k
from OFS to GND
47.5
50.0
52.5
μ
A
OFS Source Current Accuracy (Positive Offset)
47.5
50.0
52.5
μ
A
ISL6568
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