參數(shù)資料
型號(hào): ISL6567
廠商: Intersil Corporation
英文描述: Dual Low-Noise Wide-Bandwidth Precision Amplifier 8-SOIC -40 to 85
中文描述: 多用途兩相降壓PWM控制器集成MOSFET驅(qū)動(dòng)器
文件頁數(shù): 24/26頁
文件大?。?/td> 659K
代理商: ISL6567
24
This transition occurs over a time t
2
, and the approximate
the power loss is P
UMOS,2
.
A third component involves the lower MOSFET’s reverse-
recovery charge, Q
RR
. Since the lower MOSFET’s body
diode conducts the full inductor current before it has fully
switched to the upper MOSFET, the upper MOSFET has to
provide the charge required to turn off the lower MOSFET’s
body diode. This charge is conducted through the upper
MOSFET across VIN, the power dissipated as a result,
P
UMOS,3
can be approximated as:
Lastly, the conduction loss part of the upper MOSFET’s
power dissipation, P
UMOS,4,
can be calculated using the
following equation:
In this case, of course, r
DS(ON)
is the ON resistance of the
upper MOSFET.
The total power dissipated by the upper MOSFET at full load
can be approximated as the summation of these results.
Since the power equations depend on MOSFET parameters,
choosing the correct MOSFETs can be an iterative process
that involves repetitively solving the loss equations for
different MOSFETs and different switching frequencies until
converging upon the best solution.
OUTPUT CAPACITOR SELECTION
The output capacitor is selected to meet both the dynamic
load requirements and the voltage ripple requirements. The
load transient a microprocessor impresses is characterized
by high slew rate (di/dt) current demands. In general,
multiple high quality capacitors of different size and dielectric
are paralleled to meet the design constraints.
Should the load be characterized by high slew rates, attention
should be particularly paid to the selection and placement of
high-frequency decoupling capacitors (MLCCs, typically -
multi-layer ceramic capacitors). High frequency capacitors
supply the initially transient current and slow the load rate-of-
change seen by the bulk capacitors. The bulk filter capacitor
values are generally determined by the ESR (effective series
resistance) and capacitance requirements.
High frequency decoupling capacitors should be placed as
close to the power pins of the load, or for that reason, to any
decoupling target they are meant for, as physically possible.
Attention should be paid as not to add inductance in the
circuit board wiring that could cancel the usefulness of these
low inductance components. Consult with the manufacturer
of the load on specific decoupling requirements.
Use only specialized low-ESR capacitors intended for
switching-regulator applications for the bulk capacitors. The
bulk capacitor’s ESR determines the output ripple voltage
and the initial voltage drop following a high slew-rate
transient’s edge. In most cases, multiple capacitors of small
case size perform better than a single large case capacitor.
Bulk capacitor choices include aluminum electrolytic, OS-Con,
Tantalum and even ceramic dielectrics. An aluminum
electrolytic capacitor’s ESR value is related to the case size
with lower ESR available in larger case sizes. However, the
equivalent series inductance (ESL) of these capacitors
increases with case size and can reduce the usefulness of the
capacitor to high slew-rate transient loading. Unfortunately,
ESL is not a specified parameter. Consult the capacitor
manufacturer and/or measure the capacitor’s impedance with
frequency to help select a suitable component.
OUTPUT INDUCTOR SELECTION
One of the parameters limiting the converter’s response to a
load transient is the time required to change the inductor
current. In a multi-phase converter, small inductors reduce
the response time with less impact to the total output ripple
current (as compared to single-phase converters).
The output inductor of each power channel controls the
ripple current. The control IC is stable for channel ripple
current (peak-to-peak) up to twice the average current. A
single channel’s ripple current is approximated by:
The current from multiple channels tend to cancel each other
and reduce the total ripple current. The total output ripple
current can be determined using the curve in Figure 27; it
P
UMOS 2
,
V
IN
I
-------------
I
,
-------------
t
2
2
----
f
S
P
UMOS 3
,
V
IN
Q
rr
f
S
=
P
UMOS 4
,
r
DS ON
)
I
-------------
2
d
I
2
---------
+
=
1.0
0.8
0.6
0.4
0.2
0
0
0.1
0.2
0.3
0.4
0.5
DUTY CYCLE (V
O
/V
IN
)
FIGURE 27. RIPPLE CURRENT vs DUTY CYCLE
C
C
I
L PP
V
-------------------------------
V
SW
V
IN
---------------
×
=
ISL6567
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