參數(shù)資料
型號(hào)： ISL6564A
廠商： Intersil Corporation
英文描述： Multiphase PWM Controller with Linear 6-Bit DAC Capable of Precision rDS(ON) or DCR Differential Current Sensing
中文描述： 多相PWM控制器，帶有線性6位DAC能精密的RDS（ON）或DCR差分電流檢測(cè)
文件頁(yè)數(shù)： 20/28頁(yè)
文件大?。?/td> 636K
代理商： ISL6564A
20
FN6285.1
March 20, 2007
At the beginning of overcurrent shutdown, the controller
places all PWM signals in a high-impedance state within
20ns commanding the Intersil MOSFET driver ICs to turn off
both upper and lower MOSFETs. The system remains in this
state a period of 4096 switching cycles. If the controller is still
enabled at the end of this wait period, it will attempt a
soft-start. If the fault remains, the trip-retry cycles will
continue indefinitely (as shown in Figure 13) until either
controller is disabled or the fault is cleared. Note that the
energy delivered during trip-retry cycling is much less than
during full-load operation, so there, there is no thermal
hazard during this kind of operation.
Driver Enable Output
The ISL6564A has a driver enable output pin DRVEN. The
DRVEN is designed for the application where ISL6564A
needs to work with drivers that can not recognize three-state
PWM input.
In normal operation, DRVEN remains low until ISL6564A
begins soft-start ramp and then changes to high (Figure 14).
When an overcurrent event occurs, DRVEN is pulled to low
instantly (less than 20ns) to disable the driver so that both
upper and lower FETs be turned off (Figure 15). During an
overvoltage condition, DRVEN remains high to allow the
driver turn on the lower FETs based on the PWM input to
discharge the energy stored in the output inductor. Once the
Output voltage is reduced to 0.6V, DRVEN is pulled to low as
shown in Figure 16.
There’s no need to use DRVEN when ISL6564A is used to
work with Intersil’s drivers such as ISL6612 and ISL6605.
Current Sense Output
The ISL6564A has 2 current sense output pins IDROOP and
IOUT. They are identical. In typical application, IDROOP pin
is connected to FB pin for the application where load line is
required. IOUT pin was designed for load current
measurement. As shown in typical application schematics
0A
0V
2ms/DIV
OUTPUT CURRENT, 50A/DIV
FIGURE 13. OVERCURRENT BEHAVIOR IN HICCUP MODE,
F
SW
= 500kHz
OUTPUT VOLTAGE,
500mV/DIV
FIGURE 14. DRVEN WAVEFORM AT START-UP
VOUT, 1V/DIV
EN, 5V/DIV
500μs/DIV
DRVEN, 5V/DIV
0A
0V
2ms/DIV
OUTPUT CURRENT, 50A/DIV
FIGURE 15. DRVEN DURING OVERCURRENT OPERATION
OUTPUT VOLTAGE,
500mV/DIV
DRVEN, 5V/DIV
0V
2ms/DIV
FIGURE 16. DRVEN DURING OVERCURRENT OPERATION
OUTPUT VOLTAGE,
500mV/DIV
DRVEN, 5V/DIV
ISL6564A
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ISL6564ACRZ-T 功能描述:IC REG CTRLR BUCK PWM VM 40-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- PWM 型:電流模式 輸出數(shù):1 頻率 - 最大:275kHz 占空比:50% 電源電壓:18 V ~ 110 V 降壓:無(wú) 升壓:無(wú) 回掃:無(wú) 反相:無(wú) 倍增器:無(wú) 除法器:無(wú) Cuk:無(wú) 隔離:是 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 包裝:帶卷 (TR)
ISL6564AIRZ 功能描述:IC REG CTRLR BUCK PWM VM 40-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- PWM 型:電流模式 輸出數(shù):1 頻率 - 最大:275kHz 占空比:50% 電源電壓:18 V ~ 110 V 降壓:無(wú) 升壓:無(wú) 回掃:無(wú) 反相:無(wú) 倍增器:無(wú) 除法器:無(wú) Cuk:無(wú) 隔離:是 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 包裝:帶卷 (TR)
ISL6564AIRZ-T 功能描述:IC REG CTRLR BUCK PWM VM 40-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- PWM 型:電流模式 輸出數(shù):1 頻率 - 最大:275kHz 占空比:50% 電源電壓:18 V ~ 110 V 降壓:無(wú) 升壓:無(wú) 回掃:無(wú) 反相:無(wú) 倍增器:無(wú) 除法器:無(wú) Cuk:無(wú) 隔離:是 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 包裝:帶卷 (TR)
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