參數(shù)資料
型號： ISL6308
廠商： Intersil Corporation
英文描述： Quadruple 2-Input Exclusive-OR Gates 14-SOIC -40 to 85
中文描述： 三相降壓PWM控制器，帶有高電流集成MOSFET驅(qū)動器
文件頁數(shù)： 13/27頁
文件大?。?/td> 765K
代理商： ISL6308
13
FN9208.2
October 19, 2005
lumped quantity, as shown in Figure 7. The channel current,
I
L
, flowing through the inductor, passes through the DCR.
Equation 6 shows the s-domain equivalent voltage, V
L
,
across the inductor.
The inductor DCR is important because the voltage dropped
across it is proportional to the channel current. By using a
simple R-C network and a current sense amplifier, as shown
in Figure 7, the voltage drop across all of the inductors DCRs
can be extracted. The output of the current sense amplifier,
V
DROOP
, can be shown to be proportional to the channel
currents I
L1
, I
L2
, and I
L3
, shown in Equation 7.
If the R-C network components are selected such that the
R-C time constant matches the inductor L/DCR time
constant, then V
DROOP
is equal to the sum of the voltage
drops across the individual DCRs, multiplied by a gain. As
Equation 8 shows, V
DROOP
is therefore proportional to the
total output current, I
OUT
.
By simply adjusting the value of R
S
, the load line can be set
to any level, giving the converter the right amount of droop at
all load currents. It may also be necessary to compensate for
any changes in DCR due to temperature. These changes
cause the load line to be skewed, and cause the R-C time
constant to not match the L/DCR time constant. If this
becomes a problem a simple negative temperature
coefficient resistor network can be used in the place of
R
COMP
to compensate for the rise in DCR due to
temperature.
Output Voltage Offset Programming
The ISL6308 allows the designer to accurately adjust the
offset voltage by connecting a resistor, R
OFS
, from the OFS
pin to VCC or GND. When R
OFS
is connected between OFS
and VCC, the voltage across it is regulated to 1.5V. This
causes a proportional current (I
OFS
) to flow into the OFS pin
and out of the FB pin. If R
OFS
is connected to ground, the
voltage across it is regulated to 0.5V, and I
OFS
flows into the
FB pin and out of the OFS pin. The offset current flowing
through the resistor between VDIFF and FB will generate
the desired offset voltage which is equal to the product
(I
OFS
x R
1
). These functions are shown in Figures 8 and 9.
V
L
s
( )
I
L
s L
DCR
+
(
)
=
(EQ. 6)
VDROOPs
( )
-------------
1
+
1
+
)
-------------------------------------------------------------------------
-----------------------
IL1
IL2
IL3
+
+
(
)
DCR
=
(EQ. 7)
V
DROOP
R
S
--------------------
I
OUT
DCR
=
(EQ. 8)
FIGURE 7. DCR SENSING CONFIGURATION
-
+
ICOMP
DCR
L1
INDUCTOR
IL
1
V
OUT
C
OUT
-
+V
L
(s)
DCR
L2
INDUCTOR
IL
2
PHASE1
PHASE2
R
S
R
S
R
COMP
C
COMP
ISUM
IREF
ISL6308
-
+
V
DROOP
I
OUT
DROOP
C
SUM
(Optional)
E/A
FB
OFS
VCC
GND
+
-
+
-
0.5V
1.5V
GND
R
OFS
R
1
VDIFF
ISL6308
FIGURE 8. POSITIVE OFFSET OUTPUT VOLTAGE
PROGRAMMING
VREF
V
OFS
-
+
I
OFS
ISL6308
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