FN6459.3 October 19, 2009 Detailed Description The ISL54051 and ISL54052 are bidirectional, single pole/single throw (SPST) analog switches. The" />
參數(shù)資料
型號: ISL54052IRUZ-T
廠商: Intersil
文件頁數(shù): 10/12頁
文件大?。?/td> 0K
描述: IC SWITCH SPST 6UTDFN
標準包裝: 3,000
功能: 開關(guān)
電路: 1 x SPST- NC
導(dǎo)通狀態(tài)電阻: 860 毫歐
電壓電源: 單電源
電壓 - 電源,單路/雙路(±): 1.8 V ~ 5.5 V
電流 - 電源: 75nA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 6-UFDFN
供應(yīng)商設(shè)備封裝: 6-UTDFN(1.2x1.0)
包裝: 帶卷 (TR)
7
FN6459.3
October 19, 2009
Detailed Description
The ISL54051 and ISL54052 are bidirectional, single
pole/single throw (SPST) analog switches. They offer
precise switching capability from a single 1.8V to 5.5V
supply with low ON-resistance and high speed operation.
With a single supply of 5V the typical ON-resistance is
only 0.8Ω, with a typical turn-on and turn-off time
of: tON = 24ns, tOFF = 10ns. The devices are especially
well suited for portable battery powered equipment due
to their low operating supply voltage (1.8V), low power
consumption (5.5W), low leakage currents (300nA
max) and tiny TDFN and SOT-23 packages.
The ISL54051 is a single normally open (NO) SPST
analog switch. The ISL54052 is a single normally closed
(NC) SPST analog switch.
Supply Sequencing and Overvoltage
Protection
With any CMOS device, proper power supply sequencing
is required to protect the device from excessive input
currents, which might permanently damage the IC. All
I/O pins contain ESD protection diodes from the pin to
V+ and to GND (see Figure 6). To prevent forward
biasing these diodes, V+ must be applied before any
input signals, and the input signal voltages must remain
between V+ and GND. If these conditions cannot be
guaranteed, then one of the following two protection
methods should be employed.
Logic inputs can easily be protected by adding a 1kΩ
resistor in series with the input (see Figure 6). The
resistor limits the input current below the threshold that
produces permanent damage, and the sub-microamp
input current produces an insignificant voltage drop
during normal operation.
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low rON switch. Connecting schottky
diodes to the signal pins (as shown in Figure 6) will shunt
the fault current to the supply or to ground thereby
protecting the switch. These schottky diodes must be
sized to handle the expected fault current.
Power-Supply Considerations
The constuction of the ISL54051 and the ISL54052 is
typical of most single supply CMOS analog switches in
that they have two supply pins: V+ and GND. V+ and
GND drive the internal CMOS switches and set their
analog voltage limits. Unlike switches with a 4.5V
maximum supply voltage, the ISL54051 and the
ISL54052’s 5.5V maximum supply voltage provides
plenty of room for the 10% tolerance of 4.3V supplies, as
well as room for overshoot and noise spikes.
The minimum recommended supply voltage is 1.8V but
the part will operate with a supply below 1.8V. It is
important to note that the input signal range, switching
times, and ON-resistance degrade at lower supply
voltages. Refer to the “Electrical Specifications” tables
starting on page 3 and “Typical Performance Curves”
starting on page 8 for details.
V+ and GND also power the internal logic and level
shiftier. The level shiftier converts the input logic levels to
switched V+ and GND signals to drive the analog switch
gate terminals.
FIGURE 5. CAPACITANCE TEST CIRCUIT
Test Circuits and Waveforms (Continued)
V+
C
GND
NO OR NC
COM
IN
IMPEDANCE
ANALYZER
VINL OR VINH
FIGURE 6. OVERVOLTAGE PROTECTION
GND
VCOM
VNX
V+
INX
OPTIONAL
PROTECTION
RESISTOR
OPTIONAL
SCHOTTKY
DIODE
OPTIONAL
SCHOTTKY
DIODE
ISL54051, ISL54052
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