參數(shù)資料
型號: ISL54050IRUZ-T
廠商: INTERSIL CORP
元件分類: 運(yùn)動(dòng)控制電子
英文描述: Ultra Low ON-Resistance, +1.65V to +4.5V, Single Supply, Dual SPDT Analog Switch
中文描述: DUAL 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, PQCC10
封裝: 1.80 X 1.40 MM, 0.50 MM HEIGHT, ROHS COMPLIANT, MICRO, PLASTIC, MO-255, TQFN-10
文件頁數(shù): 6/12頁
文件大?。?/td> 277K
代理商: ISL54050IRUZ-T
6
FN6356.1
March 28, 2007
Test Circuits and Waveforms
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 1A. MEASUREMENT POINTS
Repeat test for all switches. C
L
includes fixture and stray
capacitance.
V
OUT
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
FIGURE 3A. MEASUREMENT POINTS
Repeat test for all switches. C
L
includes fixture and stray
capacitance.
FIGURE 3B. TEST CIRCUIT
FIGURE 3. BREAK-BEFORE-MAKE TIME
50%
t
r
< 5ns
t
f
< 5ns
t
OFF
90%
V+
0V
V
NO
0V
t
ON
LOGIC
INPUT
SWITCH
INPUT
SWITCH
OUTPUT
90%
V
OUT
V(NO or NC)
R
ON
(
L
)
+
----------------------------
=
SWITCH
INPUT
LOGIC
INPUT
V
OUT
R
L
50
Ω
C
L
35pF
COM
NO or NC
IN
GND
V+
C
V
OUT
Δ
V
OUT
ON
OFF
ON
Q =
Δ
V
OUT
x C
L
SWITCH
OUTPUT
LOGIC
INPUT
V+
0V
C
L
V
OUT
R
G
V
G
GND
COM
NO or NC
V+
C
LOGIC
INPUT
IN
Repeat test for all switches.
90%
V+
0V
t
D
LOGIC
INPUT
SWITCH
OUTPUT
V
OUT
0V
LOGIC
INPUT
IN
COM
R
L
50
Ω
C
L
35pF
V
OUT
NO
NC
V+
GND
V
NX
C
ISL54050
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