參數(shù)資料
型號(hào): ISL5314
廠商: Intersil Corporation
元件分類: XO, clock
英文描述: Direct Digital Synthesizer
中文描述: 直接數(shù)字頻率合成器
文件頁(yè)數(shù): 12/16頁(yè)
文件大?。?/td> 809K
代理商: ISL5314
12
FIGURE 4. PARALLEL-LOAD METHOD 2, UPDATE ACTIVE WHILE LOADING REGISTERS (RESET = HIGH)
FIGURE 5. RESET TIMING AND LATENCY
FIGURE 6. ENOFR (ENABLE OFFSET FREQUENCY REGISTER) TIMING AND LATENCY (RESET = HIGH)
Timing Diagrams
(Continued)
PREVIOUS FREQ
ENTIRE NEW FREQ
ANALOG OUT
t
UL
= 11 CLK RISING EDGES
UPDATE
WRITE
t
DS
t
DH
DATA
CLK (f
CLK
)
1 WRITE CYCLE FOR EVERY REGISTER
t
AS
t
AH
ADDR
PARTIAL UPDATES
WE
t
WS
t
WH
DON’T CARE
DON’T CARE
DON’T CARE
DON’T CARE
A
1
A
2
A
0
A
N
W
1
W
2
W
0
W
N
CLK (f
CLK
)
PREVIOUS REGISTER VALUES
RESET REGISTER VALUES
ANALOG OUT
t
RL
= 11 CLK RISING EDGES
RESET
ONE CLK RISING EDGE
REQUIRED WHILE RESET LOW
t
RS
CLK (f
CLK
)
CENTER FREQUENCY ONLY
CENTER + OFFSET
ANALOG OUT
t
EL
= 14 CLK RISING EDGES
t
EH
ENOFR
CENTER ONLY
CENTER
+ OFFSET
t
ES
ISL5314
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參數(shù)描述
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