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參數(shù)資料
| 型號： | IS61SPS25632D-5TQ |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | SRAM |
| 英文描述： | 256K X 32 CACHE SRAM, 5 ns, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數(shù)： | 1/22頁 |
| 文件大小： | 152K |
| 代理商： | IS61SPS25632D-5TQ |
Integrated Silicon Solution, Inc. — 1-800-379-4774
1
PRELIMINARY INFORMATION
Rev. 00A
04/17/01
This document contains PRELIMINARY INFORMATION data. ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the
best possible product. We assume no responsibility for any errors which may appear in this publication. Copyright 2001, Integrated Silicon Solution, Inc.
IS61SPS25632T/D
IS61LPS25632T/D
IS61SPS25636T/D
IS61LPS25636T/D
IS61SPS51218T/D
IS61LPS51218T/D
ISSI
FEATURES
Internal self-timed write cycle
Individual Byte Write Control and Global Write
Clock controlled, registered address, data and
control
Pentium or linear burst sequence control using
MODE input
Three chip enable option for simple depth expansion
and address pipelining
Common data inputs and data outputs
JEDEC 100-Pin TQFP and
119-pin PBGA package
Single +3.3V, +10%, –5% power supply
Power-down snooze mode
3.3V I/O For SPS
2.5V I/O For LPS
Single cycle deselect
Snooze MODE for reduced-power standby
T version (three chip selects)
D version (two chip selects)
DESCRIPTION
The
ISSI IS61SPS25632,IS61SPS25636,IS61SPS51218,
IS61LPS25632, IS61LPS25636, and IS61LPS51218 are
high-speed, low-power synchronous static RAMs designed
to provide a burstable, high-performance, secondary cache for
the Pentium, 680X0, and PowerPC microprocessors.
The IS61SPS25632 and IS61LPS25632 are organized as
262,144 words by 32 bits and the IS61SPS25636 and
IS61LPS25636 are organized as 262,144 words by 36 bits.
The IS61SPS51218 and IS61LPS51218 are organized as
524,288 words by 18 bits. Fabricated with
ISSI's advanced
CMOS technology, the device integrates a 2-bit burst
counter, high-speed SRAM core, and high-drive capability
outputs into a single monolithic circuit. All synchronous inputs
pass through registers controlled by a positive-edge-triggered
single clock input.
Write cycles are internally self-timed and are initiated by the
rising edge of the clock input. Write cycles can be from one
to four bytes wide as controlled by the write control inputs.
Separate byte enables allow individual bytes to be written.
Byte write operation is performed by using byte write
enable (
BWE).input combined with one or more individual
byte write signals (
BWx). In addition, Global Write (GW)
is available for writing all bytes at one time, regardless of
the byte write controls.
Bursts can be initiated with either
ADSP (Address Status
Processor) or
ADSC (Address Status Cache Controller)
input pins. Subsequent burst addresses can be generated
internally and controlled by the
ADV (burst address
advance) input pin.
The mode pin is used to select the burst sequence order,
Linear burst is achieved when this pin is tied LOW. Interleave
burst is achieved when this pin is tied HIGH or left floating.
256K x 32, 256K x 36, 512K x 18
SYNCHRONOUS PIPELINE,
SINGLE-CYCLE DESELECT STATIC RAM
PRELIMINARY INFORMATION
SEPTEMBER 2000
FAST ACCESS TIME
Symbol
Parameter
-166*
-150
-133
-5
Units
tKQ
Clock Access Time
3.5
3.8
4
5
ns
tKC
Cycle Time
6
6.7
7.5
10
ns
Frequency
166
150
133
100
MHz
*This speed available only in SPS version
相關PDF資料 |
PDF描述 |
|---|---|
| IS61VF102436A-6.5B3I | 1M X 36 CACHE SRAM, 6.5 ns, PBGA165 |
| IS62LV25616LL-70TI | x16 SRAM |
| IS62LV25616LL-85B | x16 SRAM |
| IS62LV25616LL-85BI | x16 SRAM |
| IS62LV25616LL-85M | x16 SRAM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| IS61VF102418A-6.5B3 | 功能描述:靜態(tài)隨機存取存儲器 18Mb,Flow-Through,Sync,1Mb x 18,6.5ns,2.5v I/O,165 Ball BGA RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS61VF102418A-6.5B3I | 功能描述:靜態(tài)隨機存取存儲器 18Mb,Flow-Through,Sync,1Mb x 18,6.5ns,2.5v I/O,165 Ball BGA RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS61VF102418A-6.5B3I-TR | 功能描述:靜態(tài)隨機存取存儲器 18Mb,Flow-Through,Sync,1Mb x 18,6.5ns,2.5v I/O,165 Ball BGA RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS61VF102418A-6.5B3-TR | 功能描述:靜態(tài)隨機存取存儲器 18Mb,Flow-Through,Sync,1Mb x 18,6.5ns,2.5v I/O,165 Ball BGA RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS61VF102418A-6.5TQ | 功能描述:靜態(tài)隨機存取存儲器 18Mb,Flow-Through,Sync,1Mb x 18,6.5ns,2.5v I/O,100 Pin TQFP RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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