1. Minimum, Typical, and Max" />
參數(shù)資料
型號(hào)： IDT89HPES32T8ZHBX
廠商： IDT, Integrated Device Technology Inc
文件頁(yè)數(shù)： 7/37頁(yè)
文件大?。?/td> 0K
描述： IC PCI SW 32LANE 8PORT 500-SBGA
標(biāo)準(zhǔn)包裝： 27
系列： PRECISE™
類型： PCI Express 開(kāi)關(guān) - Gen1
應(yīng)用： 服務(wù)器，儲(chǔ)存，通信，嵌入式，消費(fèi)品
安裝類型： 表面貼裝
封裝/外殼： 500-LBGA
供應(yīng)商設(shè)備封裝： 500-SBGA（31x31）
包裝： 托盤
其它名稱： 89HPES32T8ZHBX
15 of 37
March 25, 2008
IDT 89PES32T8 Data Sheet
Figure 6 GPIO AC Timing Waveform
1. Minimum, Typical, and Maximum values meet the requirements under PCI Specification 1.1
Signal
Symbol Reference
Edge
Min Max Unit
Timing
Diagram
Reference
GPIO
GPIO[15:0]1
1. GPIO signals must meet the setup and hold times if they are synchronous or the minimum pulse width if
they are asynchronous.
Tpw_13b2
2. The values for this symbol were determined by calculation, not by testing.
None
50
—
ns
Table 11 GPIO AC Timing Characteristics
Signal
Symbol
Reference
Edge
Min
Max
Unit
Timing
Diagram
Reference
JTAG
JTAG_TCK
Tper_16a
none
50.0
—
ns
Thigh_16a,
Tlow_16a
10.0
25.0
ns
JTAG_TMS1,
JTAG_TDI
1. The JTAG specification, IEEE 1149.1, recommends that JTAG_TMS should be held at 1 while the signal applied at JTAG_TRST_N
changes from 0 to 1. Otherwise, a race may occur if JTAG_TRST_N is deasserted (going from low to high) on a rising edge of JTAG_TCK
when JTAG_TMS is low, because the TAP controller might go to either the Run-Test/Idle state or stay in the Test-Logic-Reset state.
Tsu_16b
JTAG_TCK rising
2.4
—
ns
Thld_16b
1.0
—
ns
JTAG_TDO
Tdo_16c
JTAG_TCK falling
—
20
ns
Tdz_16c2
2. The values for this symbol were determined by calculation, not by testing.
—20
ns
JTAG_TRST_N
Tpw_16d2
none
25.0
—
ns
Table 12 JTAG AC Timing Characteristics
Tpw_13b
GPIO (asynchronous input)
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IDT89HPES32T8ZHBXG 功能描述:IC PCI SW 32LANE 8PORT 500-SBGA RoHS:是 類別:集成電路 (IC) >> 專用 IC 系列:PRECISE™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝
IDT89HPES34H16ZABL 功能描述:IC PCI SW 34LANE 16PORT 1156FBGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:PRECISE™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝
IDT89HPES34H16ZABLG 制造商:Integrated Device Technology Inc 功能描述:IC PCIE SW 34LANE 16PORT 1156BGA
IDT89HPES34H16ZABLGI 制造商:Integrated Device Technology Inc 功能描述:IC PCIE SW 34LANE 16PORT 1156BGA
IDT89HPES34H16ZABLI 功能描述:IC PCI SW 34LANE 16PORT 1156FBGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:PRECISE™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝
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