參數(shù)資料
型號： IDT82P2828BHG
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 5/154頁
文件大小： 0K
描述： IC LIU T1/J1/E1 28+1CH 640-PBGA
標(biāo)準(zhǔn)包裝： 5
類型： 線路接口裝置（LIU）
規(guī)程： E1
電源電壓： 3.13 V ~ 3.47 V
安裝類型： 表面貼裝
封裝/外殼： 640-BGA 裸露焊盤
供應(yīng)商設(shè)備封裝： 640-PBGA-EP（31x31）
包裝： 托盤
其它名稱： 82P2828BHG
IDT82P2828
28(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
Programming Information
102
February 6, 2009
AISG - AIS Generation Control Register
Address: 00FH, 04FH, 08FH, 0CFH, 10FH, 14FH, 18FH, 1CFH, (CH1~CH8)
20FH, 24FH, 28FH, 2CFH, 30FH, 34FH, 38FH, 3CFH, (CH9~CH16)
40FH, 44FH, 48FH, 4CFH, 50FH, 54FH, 58FH, 5CFH, (CH17~CH24)
60FH, 64FH, 68FH, 6CFH, (CH25~CH28)
7CFH (CH0)
Type: Read / Write
Default Value: 00H
Bit
Name
Description
7 - 4
-
Reserved.
3
ASAIS_SLOS This bit controls the AIS generation in the receive path once SLOS is detected.
0: Disable. (default)
1: Enable.
2
ASAIS_LLOS This bit controls the AIS generation in the receive path once LLOS is detected.
0: Disable. (default)
1: Enable.
1
ALAIS_SLOS This bit controls the AIS generation in the transmit path once SLOS is detected.
0: Disable. (default)
1: Enable.
0
ALAIS_LLOS This bit controls the AIS generation in the transmit path once LLOS is detected.
0: Disable. (default)
1: Enable.
7
654321
0
----
ASAIS_SLOS
ASAIS_LLOS
ALAIS_SLOS
ALAIS_LLOS
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