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October 4, 2005
RC32336
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PCI Interface
– 32-bit PCI revision 2.2 compliant
– Supports host or satellite operation in both master and target
modes
– PCI clock: supports frequencies from 16 MHz to 66 MHz, PCI
clock may be asynchronous to master clock (CLK)
– PCI arbiter in Host mode: supports 3 external masters, fixed
priority or round robin arbitration
–I2O “l(fā)ike” PCI Messaging Unit
x
Two Ethernet Interfaces
– 10 and 100 Mb/s ISO/IEC 8802-3:1996 compliant
– Two IEEE 802.3u compatible Media Independent Interfaces
(MII) with serial management interface
– MII supports IEEE 802.3u auto-negotiation speed selection
– Supports 64 entry hash table based multicast address filtering
– 512 byte transmit and receive FIFOs
– Supports flow control functions outlined in IEEE Std. 802.3x-
1997
x
SDRAM Controller
– Supports up to 512 MB of memory
– 2 chip selects (each supports 2 or 4 banks internal SDRAM
banks)
– 32-bit data width, supports 8/16/32-bit width devices
– Supports 16Mb, 64Mb, 128Mb, and 256Mb, and 512Mb
devices
– Automatic refresh generation
x
Memory and Peripheral Device Controller
– Provides “glueless” interface to standard SRAM, Flash, ROM,
dual-port memory, and peripheral devices
– Provides “glueless” interface to many 16-bit PCMCIA devices
– Demultiplexed address and data buses: 32-bit data bus, 26-bit
address bus, 6 chip selects, control for external data bus
buffers
– Supports 8-bit, 16-bit, and 32-bit width devices: automatic byte
gathering and scattering
– Flexible protocol configuration parameters: programmable
number of wait states (0 to 63), programmable postread/post-
write delay (0 to 31), supports external wait state generation,
supports Intel and Motorola style peripherals
– Write protect capability per chip select
– Programmable bus transaction timer generates warm reset
when counter expires
– Supports up to 64MB of memory per chip select
x
DMA Controller
– 6 DMA channels: two channels for each of the two Ethernet
interfaces (transmit/receive) and two channels for PCI (PCI to
Memory and Memory to PCI)
– Provides flexible descriptor based operation
– Supports unaligned transfers (i.e., source or destination
address may be on any byte boundary) with arbitrary byte
length
x
General Purpose Peripherals
– Serial port compatible with 16550 Universal Asynchronous
Receiver Transmitter (UART)
– Three general purpose 32-bit counter/timers
– Interrupt Controller
– Serial Peripheral Interface (SPI) supporting host mode
– 16 general purpose I/O (GPIO) pins which can be configured
as interrupt sources
x
System Features
– JTAG Interface (IEEE Std. 1149.1 compatible)
– 256 pin CABGA package
– 2.5V core supply and 3.3V I/O supply
C
CPU Execution Core
PU Execution Core
The RC32336 is built around the RC32300 32-bit high performance
microprocessor core. The RC32300 implements the enhanced MIPS-II
ISA and helps meet the real-time goals and maximize throughput of
communications and consumer systems by providing capabilities such
as a prefetch instruction, multiple DSP instructions, and cache locking.
The instruction set is largely compatible with the MIPS32 instruction set,
allowing the customer to select from a broad range of software and
development tools. Cache locking guarantees real-time performance by
holding critical code and parameters in the cache for immediate avail-
ability. The microprocessor also implements an on-chip MMU with a
TLB, making the it fully compliant with the requirements of real time
operating systems.
P
PP
PCI Interface
CI Interface
The PCI interface on the RC32336 is compatible with version 2.2 of
the PCI specification. An on-chip arbiter supports up to three external
bus masters, supporting both fixed priority and rotating priority arbitra-
tion schemes. The RC32336 can support both satellite and host PCI
configurations, enabling it to act as a slave controller for a PCI add-in
card application, or as the primary PCI controller in the system. The PCI
interface can be operated synchronously or asynchronously to the other
I/O interfaces on the RC32336 device.
PCMCIA Interface
The RC32336 provides a "glueless" connection to a single PCMCIA
I/O device via the memory and peripheral device controller. The
PCMCIA interface allows the RC32336 to connect to various types of I/
O peripherals including fax modems, storage devices, and wireless LAN
chipsets. The RC32336 implementation provides a maximum
throughput of 160 Mbps through the 16-bit wide interface as specified
by the PCMCIA 2.1 Standard.
Ethernet Interface
The RC32336 has two Ethernet Channels supporting 10Mbps and
100Mbps speeds and provides a standard media independent interface
(MII) off-chip, allowing a wide range of external devices to be connected
efficiently.