參數(shù)資料
型號: IDT74LVCHR16646APA
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 總線收發(fā)器
英文描述: LVC/LCX/Z SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
封裝: TSSOP-56
文件頁數(shù): 2/8頁
文件大?。?/td> 99K
代理商: IDT74LVCHR16646APA
INDUSTRIALTEMPERATURERANGE
2
IDT74LVCHR16646A
3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER WITH 3-STATE OUTPUTS
SSOP/ TSSOP/ TVSOP
TOP VIEW
PIN CONFIGURATION
Symbol
Description
Max
Unit
VTERM
Terminal Voltage with Respect to GND
–0.5 to +6.5
V
TSTG
Storage Temperature
–65 to +150
°C
IOUT
DC Output Current
–50 to +50
mA
IIK
Continuous Clamp Current,
–50
mA
IOK
VI < 0 or VO < 0
ICC
Continuous Current through each
±100
mA
ISS
VCC or GND
ABSOLUTE MAXIMUM RATINGS(1)
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
NOTE:
1. As applicable to the device type.
Symbol
Parameter(1)
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
4.5
6
pF
COUT
Output Capacitance
VOUT = 0V
6.5
8
pF
CI/O
I/O Port Capacitance
VIN = 0V
6.5
8
pF
CAPACITANCE (TA = +25°C, F = 1.0MHz)
1DIR
1
SAB
GND
1
A1
VCC
GND
VCC
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
48
49
50
51
52
53
54
55
56
1
GND
25
26
27
28
32
31
30
29
1CLKAB
1
A2
1
A3
1
A4
1
A5
1
A6
1
A7
1
A8
2
A1
2
A2
2
A3
2
A4
2
A5
2
A6
2
A7
2
A8
2
SAB
2
CLKAB
2
DIR
1OE
1
SBA
GND
1
B1
VCC
GND
VCC
GND
1CLKBA
1
B2
1
B3
1
B4
1
B5
1
B6
1
B8
2
B1
2
B2
2
B3
2
B4
2
B5
2
B6
2
B7
2
B8
2
SBA
2
CLKBA
2
OE
1
B7
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
Pin Names
Description
xAx
Data Register A Inputs(1)
Data Register B Outputs
xBx
Data Register B Inputs(1)
Data Register A Outputs
xCLKAB, xCLKBA
Clock Pulse Inputs
xSAB, xSBA
Output Data Source Select Inputs
xOE
Output Enable Inputs (Active LOW)
xDIR
DirectionControlInputs
PIN DESCRIPTION
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