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參數(shù)資料
| 型號(hào)： | IDT74LVCH32373ABF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVC/LCX/Z SERIES, QUAD 8-BIT DRIVER, TRUE OUTPUT, PBGA96 |
| 封裝： | LFBGA-96 |
| 文件頁(yè)數(shù)： | 3/7頁(yè) |
| 文件大?。?/td> | 117K |
| 代理商： | IDT74LVCH32373ABF |
INDUSTRIALTEMPERATURERANGE
IDT74LVCH32373A
3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
3
Pin Names
Description
xDx
Data Inputs(1)
xLE
Latch Enable Inputs (Active HIGH)
xOE
Output Enable Inputs (Active LOW)
xQx
3-State Outputs
PIN DESCRIPTION
Symbol
Description
Max
Unit
VTERM
Terminal Voltage with Respect to GND
–0.5 to +6.5
V
TSTG
Storage Temperature
–65 to +150
°C
IOUT
DC Output Current
–50 to +50
mA
IIK
Continuous Clamp Current,
–50
mA
IOK
VI < 0 or VO < 0
ICC
Continuous Current through each
±100
mA
ISS
VCC or GND
ABSOLUTE MAXIMUM RATINGS(1)
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
NOTE:
1. As applicable to the device type.
Symbol
Parameter(1)
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
4.5
6
pF
COUT
Output Capacitance
VOUT = 0V
6.5
8
pF
CI/O
I/O Port Capacitance
VIN = 0V
6.5
8
pF
CAPACITANCE (TA= +25°C, F = 1.0MHz)
BUS-HOLDCHARACTERISTICS
Symbol
Parameter(1)
Test Conditions
Min.
Typ.(2)
Max.
Unit
IBHH
Bus-HoldInputSustainCurrent
VCC = 3V
VI = 2V
– 75
—
A
IBHL
VI = 0.8V
75
—
IBHH
Bus-HoldInputSustainCurrent
VCC = 2.3V
VI = 1.7V
—
A
IBHL
VI = 0.7V
—
IBHHO
Bus-Hold Input Overdrive Current
VCC = 3.6V
VI = 0 to 3.6V
—
±500
A
IBHLO
NOTES:
1. Pins with Bus-Hold are identified in the pin description.
2. Typical values are at VCC = 3.3V, +25°C ambient.
FUNCTION TABLE (EACH8-BITSECTION)(1)
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
2. Output level of Q before the indicated steady-state conditions were established.
Inputs
Outputs
xOE
xLE
xDx
xQx
LH
H
LH
L
HX
X
Z
LL
X
Q(2)
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