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參數(shù)資料
| 型號(hào)： | IDT74FCT2652ATQG8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | FCT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| 封裝： | QSOP-24 |
| 文件頁數(shù)： | 3/9頁 |
| 文件大小： | 83K |
| 代理商： | IDT74FCT2652ATQG8 |
INDUSTRIALTEMPERATURERANGE
IDT74FCT2652AT/CT
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
3
NOTES:
1. H = HIGH
L = LOW
X = Don't Care
↑ = LOW-to-HIGH transition.
Select control = L: clocks can occur simultaneously.
Select control = H: clocks must be staggered in order to load both registers.
2. The data output functions may be enabled or disabled by various signals at the GAB or GBA inputs. Data input functions are always enabled, i.e. data at the bus pins will be stored
on every LOW-to-HIGH transition on the clock inputs.
FUNCTION TABLE(1)
Inputs
Data I/O
GAB
GBA
CPAB
CPBA
SAB
SBA
A1 - A8
B1 - B8
Operation
H
X
H or L
X
Input
Isolation
HX
↑↑
X
Store A and B Data
XH
↑
H or L
X
Input
Unspecified
(2)
Store A, Hold B
HH
↑↑
X
Input
Output
Store A in Both Registers
L
X
H or L
↑
X
Unspecified
(2)
Input
Hold A, Store B
LL
↑↑
X
Output
Input
Store B in Both Registers
L
X
L
Output
Input
Real-Time B Data to A Bus
L
X
H or L
X
H
Stored B Data to A Bus
L
H
X
L
X
Input
Output
Real-Time A Data to B Bus
L
H
H or L
X
H
X
Stored A Data to B Bus
H
L
H or L
H
Output
Stored A Data to B Bus
Stored B Data to A Bus
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT74FCT2652TQ | 制造商:Integrated Device Technology Inc 功能描述: |
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| IDT74FCT273ATSO | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74FCT273HTP | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| IDT74FCT273P | 制造商:Integrated Device Technology Inc 功能描述: |
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