參數資料
型號: IDT74FCT163501CPA8
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 總線收發(fā)器
英文描述: FCT SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
封裝: TSSOP-56
文件頁數: 1/7頁
文件大?。?/td> 78K
代理商: IDT74FCT163501CPA8
1
IDT74FCT163501A/C
3.3V CMOS 18-BIT REGISTERED TRANSCEIVER
INDUSTRIALTEMPERATURERANGE
APRIL 2002
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2002 Integrated Device Technology, Inc.
DSC-2776/6
FEATURES:
0.5 MICRON CMOS Technology
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range, or VCC = 2.7V to 3.6V, Extended
Range
CMOS power levels (0.4
W typ. static)
Rail-to-rail output swing for increased noise margin
Low Ground Bounce (0.3V typ.)
Inputs (except I/O) can be driven by 3.3V or 5V components
Available in SSOP, TSSOP, and TVSOP packages
FUNCTIONAL BLOCK DIAGRAM
IDT74FCT163501A/C
3.3V CMOS 18-BIT
REGISTERED TRANSCEIVER
DESCRIPTION:
The FCT163501 18-bit registered transceivers are built using advanced
dual metal CMOS technology. These high-speed, low-power 18-bit
registered bus transceivers combine D-type latches and D-type flip-flops to
allowdataflowintransparent,latchedandclockedmodes. Dataflowineach
direction is controlled by output-enable (OEAB and OEBA), latch enable
(LEAB and LEBA) and clock (CLKAB and CLKBA) inputs. For A-to-B data
flow, the device operates in transparent mode when LEAB is high. When
LEAB is low, the A data is latched if CLKAB is held at a high or low logic level.
If LEAB is low, the A bus data is stored in the latch/flip-flop on the low-to-high
transitionofCLKAB. OEABperformstheoutputenablefunctionontheBport.
Data flow from B port to A port is similiar but requires using OEBA, LEBA
and CLKBA. Flow-through organization of signal pins simplifies layout. All
inputs are designed with hysteresis for improved noise margin.
The FCT163501 has series current limiting resistors. These offer low
ground bounce, minimal undershoot, and controlled output fall times-
reducing the need for external series terminating resistors.
B1
C
D
C
D
A1
LEAB
CLKAB
OEBA
LEBA
CLKBA
OEAB
TO 17 OTHER CHANNELS
C
D
C
D
1
30
28
27
55
2
3
54
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