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參數(shù)資料
| 型號(hào)： | IDT74FCT162H501ATEG |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | FCT SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, CDFP56 |
| 封裝： | 0.635 MM PITCH, CERPACK-56 |
| 文件頁(yè)數(shù)： | 1/7頁(yè) |
| 文件大?。?/td> | 124K |
| 代理商： | IDT74FCT162H501ATEG |
1
IDT54/74FCT162H501AT/CT/ET
FASTCMOS18-BITREGISTEREDTRANSCEIVER
MILITARYANDCOMMERCIALTEMPERATURERANGES
AUGUST 1999
1999
Integrated Device Technology, Inc.
DSC-5434/-
c
IDT54/74FCT162H501AT/CT/ET
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FAST CMOS
18-BIT REGISTERED
TRANSCEIVER
DESCRIPTION:
The FCT162H501AT/CT/ET 18-bit registered transceivers are built
using advanced dual metal CMOS technology. These high-speed, low-
power 18-bit registered bus transceivers combine D-type latches and D-
type flip-flops to allow data flow in transparent, latched and clocked modes.
Data flow in each direction is controlled by output-enable (OEAB and
OEBA), latch enable (LEAB and LEBA) and clock (CLKAB and CLKBA)
inputs. For A-to-B data flow, the device operates in transparent mode when
LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at
a high or low logic level. If LEAB is low, the A bus data is stored in the latch/
flip-flop on the low-to-high transition of CLKAB. OEAB is the output enable
for the B port. Data flow from the B port to the A port is similar but requires
using
OEBA, LEBA and CLKBA. Flow-through organization of signal pins
simplifies layout. All inputs are designed with hysteresis for improved noise
margin.
The FCT162H501AT/CT/ET has "Bus Hold" which retains the input's
last state whenever the input goes to high impedance. This prevents
"floating" inputs and eliminates the need for pull-up/down resistors.
FUNCTIONAL BLOCK DIAGRAM
OEBA
CLKBA
LEBA
OEAB
CLKAB
LEAB
B1
A1
C
D
C
D
C
TO 17 OTHER CHANNELS
1
30
28
27
55
2
3
54
FEATURES:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical tSK(o) (Output Skew) < 250ps
Low input and output leakage ≤ 1A (max.)
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP
and 25 mil pitch CERPACK packages
Extended commercial range of -40°C to +85°C
Bus Hold retains last active bus state during 3-state
Eliminates the need for external pull up resistors
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| IDT74FCT163244APV | 制造商:Integrated Device Technology Inc 功能描述: |
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