參數(shù)資料
型號(hào): IDT74FCT162H952BTPV
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi): 總線收發(fā)器
英文描述: FCT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
封裝: SSOP-56
文件頁(yè)數(shù): 1/7頁(yè)
文件大?。?/td> 149K
代理商: IDT74FCT162H952BTPV
1
IDT74FCT162H952AT/BT/CT/ET
FASTCMOS16-BITREGISTEREDTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
MAY 2001
2001 Integrated Device Technology, Inc.
DSC-5441/-
c
IDT74FCT162H952AT/BT/CT/ET
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS
16-BIT REGISTERED
TRANSCEIVER
DESCRIPTION:
The FCT162H952T 16-bit registered transceiver is built using ad-
vanced dual metal CMOS technology. These high-speed, low-power
devices are organized as two independent 8-bit D-type registered trans-
ceivers with separate input and output control for independent control of data
flow in either direction. For example, the A-to-B Enable (x
CEAB) must be
low to enter data from the A port. xCLKAB controls the clocking function.
When xCLKAB toggles from low-to-high, the data present on the A port will
be clocked into the register. x
OEAB performs the output enable function on
the B port. Data flow from the B port to A port is similar but requires using
x
CEBA, xCLKBA, and xOEBA inputs. Full 16-bit operation is achieved by
tying the control pins of the independent transceivers together.
The FCT162H952T has "Bus Hold" which retains the input's last state
whenever the input goes to high impedance. This prevents "floating" inputs
and eliminates the need for pull-up/down resistors.
FUNCTIONAL BLOCK DIAGRAM
2
OEAB
2
CEBA
2
CLKBA
2
OEBA
2
CEAB
2
CLKAB
2
A1
2
B1
TO SEVEN OTHE R CHANNELS
D
C
D
C
CE
1
OEAB
1
CEBA
1
CLKBA
1
OEBA
1
CEAB
1
CLKAB
1
A1
1
B1
TO SEVEN OTHER CHANNELS
D
C
D
C
CE
54
55
1
3
2
56
5
52
31
30
28
26
27
29
15
42
FEATURES:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical tSK(o) (Output Skew) < 250ps
Low input and output leakage ≤ 1A (max.)
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
Bus Hold retains last active bus state during 3-state
Eliminates the need for external pull up resistors
Power off disable outputs permit “l(fā)ive insertion”
Available in SSOP and TSSOP packages
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