參數(shù)資料
型號(hào)： IDT7005L55PF
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： SRAM
英文描述： Dual, Ultra Low Cost, RRIO CMOS Amplifier
中文描述： 8K X 8 DUAL-PORT SRAM, 55 ns, PQFP64
封裝： 14 X 14 MM, 1.40 MM HEIGHT, TQFP-64
文件頁(yè)數(shù)： 5/20頁(yè)
文件大?。?/td> 189K
代理商： IDT7005L55PF
6.42
IDT7005S/L
High-Speed 8K x 8 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
13
2738 drw 13
tDW
tAPS
(1)
ADDR"A"
tWC
DATAOUT "B"
MATCH
tWP
R/
W"A"
DATAIN "A"
ADDR"B"
tDH
VALID
MATCH
BUSY"B"
tBDA
VALID
tBDD
tDDD
(3)
tWDD
Timing Waveform of Write with Port-to-Port Read with BUSY(2,5)
(M/S = VIH)(4)
NOTES:
1. tWH must be met for both
BUSY input (slave) and output (master).
2.
BUSY is asserted on Port "B", blocking R/W"B", until BUSY"B" goes HIGH
3. tWB is only for the 'Slave' Version..
NOTES:
1. To ensure that the earlier of the two ports wins. tAPS is ignored for for M/S = VIL (slave).
2.
CEL = CER = VIL
3.
OE = VIL for the reading port.
4.
If M/
S = VIL (slave), then BUSY is an input (BUSY"A" =VIH), and BUSY"B" = "don't care", for this example.
5.
All timing is the same for left and right ports. Port "A" may be either the left or right port. Port "B" is the port opposite port "A".
Timing Waveform of Write with BUSY
2738 drw 14
R/
W"A"
BUSY"B"
tWP
tWB
(3)
R/
W"B"
tWH
(1)
(2)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IDT7005L55PF8 功能描述:IC SRAM 64KBIT 55NS 64TQFP RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:72 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 同步 存儲(chǔ)容量:9M（256K x 36） 速度:75ns 接口:并聯(lián) 電源電壓:3.135 V ~ 3.465 V 工作溫度:-40°C ~ 85°C 封裝/外殼:100-LQFP 供應(yīng)商設(shè)備封裝:100-TQFP（14x14） 包裝:托盤 其它名稱:71V67703S75PFGI
IDT7005L55PFB 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM
IDT7005L55XL 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Dual-Port SRAM
IDT7005L55XLB 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Dual-Port SRAM
IDT7005L70F 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM
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