- 您現(xiàn)在的位置：買賣IC網 > PDF目錄2000 > IDT5T9890NLI8 (IDT, Integrated Device Technology Inc)IC CLK DRIVER 2.5V PLL 68-VFQFPN PDF資料下載
參數(shù)資料
| 型號： | IDT5T9890NLI8 |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 28/37頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLK DRIVER 2.5V PLL 68-VFQFPN |
| 產品變化通告： | Product Discontinuation 05/Jan/2011 |
| 標準包裝： | 2,500 |
| 類型： | PLL 時鐘驅動器 |
| PLL： | 帶旁路 |
| 輸入： | eHSTL，HSTL，LVPECL，LVTTL |
| 輸出： | eHSTL，HSTL，LVTTL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:10 |
| 差分 - 輸入:輸出： | 是/無 |
| 頻率 - 最大： | 250MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 2.3 V ~ 2.7 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 68-VFQFN 裸露焊盤 |
| 供應商設備封裝： | 68-VFQFPN（10x10） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 5T9890NLI8 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當前第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁
34
INDUSTRIALTEMPERATURERANGE
IDT5T9890
EEPROM PROGRAMMABLE 2.5V PROGRAMMABLE SKEW PLL CLOCK DRIVER
Thefollowingsectionsprovideabriefdescriptionofeachinstruction.Fora
completedescriptionrefertotheIEEEStandardTestAccessPortSpecification
(IEEE Std. 1149.1-1990).
EXTEST
TherequiredEXTESTinstructionplacestheICintoanexternalboundary-
test mode and selects the boundary-scan register to be connected between
TDIandTDO. Duringthisinstruction,theboundary-scanregisterisaccessed
todrivetestdataoff-chipthroughtheboundaryoutputs,andrecievetestdata
off-chipthroughtheboundaryinputs. Assuch,theEXTESTinstructionisthe
workhorseofIEEE.Std1149.1,providingforprobe-lesstestingofsolder-joint
opens/shortsandoflogicclusterfunction.
SAMPLE/PRELOAD
The required SAMPLE/PRELOAD instruction allows the IC to remain in a
normalfunctionalmodeandselectstheboundary-scanregistertobeconnected
betweenTDIandTDO.Duringthisinstruction,theboundary-scanregistercan
beaccessedviaadatascanoperation,totakeasampleofthefunctionaldata
entering and leaving the IC.
IDCODE
TheoptionalIDCODEinstructionallowstheICtoremaininitsfunctionalmode
andselectstheoptionaldeviceidentificationregistertobeconnectedbetween
TDI and TDO. The device identification register is a 32-bit shift register
containing information regarding the IC manufacturer, device type, and
version code. Accessing the device identification register does not interfere
with the operation of the IC. Also, access to the device identification register
shouldbeimmediatelyavailable,viaaTAPdata-scanoperation,afterpower-
up of the IC or after the TAP has been reset using the optional TRST pin or
by otherwise moving to the Test-Logic-Reset state.
PROGWRITE
The PROGWRITE instruction is for writing the IDT5T9890 configuration
datatothedevice’svolatileprogrammingregisters. Thisinstructionselectsthe
programmingregisterpathforshiftingdatafromTDItoTDOduringdataregister
scanning. The programming register path has 112 registers (14 bytes)
between TDI and TDO. The 12 configuration data bytes are scanned in
throughTDIfirst,startingwithBit0. Afterscanninginthelastconfigurationbit,
Bit95,sixteenadditionalbitsmustbescannedintoplacetheconfigurationdata
intheproperlocation. Thelastsixteenregistersintheprogrammingpathare
reserved, read-only registers.
PROGREAD
ThePROGREADinstructionisforreadingouttheIDT5T9890configuration
datafromthedevice’svolatileprogrammingregisters. Thisinstructionselects
the programming register path for shifting data from TDI to TDO during data
registerscanning. Theprogrammingregisterpathhas112registersbetween
TDI and TDO, and the first bit scanned out through TDO will be Bit 0 of the
configurationdata.
PROGSAVE and PROGRESTORE (EEPROM OPERATION)
The PROGSAVE instruction is for copying the IDT5T9890 configuration
data from the device’s volatile programming registers to the EEPROM. This
instructionselectstheBYPASSregisterpathforshiftingdatafromTDItoTDO
during data register scanning.
ThePROGRESTOREinstructionisforloadingtheIDT5T9890configuration
data from the EEPROM to the device’s volatile programming registers. This
instructionselectstheBYPASSregisterpathforshiftingdatafromTDItoTDO
during data register scanning.
DuringtheexecutionofaPROGSAVEorPROGRESTOREinstruction,the
IDT5T9890willnotacceptanewprogramminginstruction(read,write,save,
orrestore). Allnon-programmingJTAGinstructionswillfunctionproperly,but
theusershouldwaituntilthesaveorrestoreiscompletebeforeissuinganew
programminginstruction. Thetimeittakesforthesaveandrestoreinstructions
tocompletedependsonthePLLoscillatorfrequency,FVCO. Therestoretime,
TRESTORE, and the save time, TSAVE, can be calculated as follows:
TRESTORE = 1.23X109/FVCO
(mS)
TSAVE = 3.09X109/FVCO + 52
(mS)
If a new programming instruction is issued before the save or restore
completes, the new instruction is ignored, and the BYPASS register path
remainsineffectforshiftingdatafromTDItoTDOduringdataregisterscanning.
InorderfortheProgSaveandProgRestoreinstructionstofunctionproperly,
the IDT5T9890 must not be in power-down mode (PD must be HIGH), and
the PLL must be enabled (PLL_EN = LOW and Bit 57 = 0).
Onpower-upoftheIDT5T9890,anautomaticrestoreisperformedtoload
the EEPROM contents into the internal programming registers. The auto-
restorewillnotfunctionproperlyifthedeviceisinpower-downmode(PDmust
beHIGH). Thedevice'sauto-restorefeaturewillfunctionregardlessofthestate
of the PLL_EN pin or Bit 57. The time it takes for the device to complete the
auto-restoreisapproximately3ms.
CLAMP
TheoptionalCLAMPinstructionloadsthecontentsfromtheboundary-scan
register onto the outputs of the IC, and selects the one-bit bypass register to
be connected between TDI and TDO. During this instruction, data can be
shifted through the bypass register from TDI to TDO without affecting the
conditionoftheICoutputs.
HIGH-IMPEDANCE
TheoptionalHigh-Impedanceinstructionsetsalloutputs(includingtwo-state
aswellasthree-statetypes)ofanICtoadisabled(high-impedance)stateand
selects the one-bit bypass register to be connected between TDI and TDO.
Duringthisinstruction,datacanbeshiftedthroughthebypassregisterfromTDI
toTDOwithoutaffectingtheconditionoftheICoutputs.
BYPASS
The required BYPASS instruction allows the IC to remain in a normal
functional mode and selects the one-bit bypass register to be connected
between TDI and TDO. The BYPASS instruction allows serial data to be
transferredthroughtheICfromTDItoTDOwithoutaffectingtheoperationof
the IC.
相關PDF資料 |
PDF描述 |
|---|---|
| IDT5V19EE604NDGI8 | IC PLL CLK GEN 200MHZ 28VFQFPN |
| IDT5V40501DVG | IC CLK GEN PLL 160MHZ 8TSSOP |
| IDT5V41064NLGI | IC CLK GEN 1:1 16QFN |
| IDT5V41066PGG | IC CLK GEN SPRED SPECTRM 20TSSOP |
| IDT5V49EE901NLGI8 | IC PLL CLK GEN 200MHZ 32VFQFN |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| IDT5T9891NLGI | 功能描述:IC CLK DRIVER 2.5V PLL 68-VFQFPN RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設備封裝:* 包裝:* |
| IDT5T9891NLGI8 | 功能描述:IC CLK DRIVER 2.5V PLL 68-VFQFPN RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設備封裝:* 包裝:* |
| IDT5T9891NLI | 功能描述:IC CLK DRIVER 2.5V PLL 68-VFQFPN RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設備封裝:* 包裝:* |
| IDT5T9891NLI8 | 功能描述:IC CLK DRIVER 2.5V PLL 68-VFQFPN RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設備封裝:* 包裝:* |
| IDT5T989X-982X-M1 | 功能描述:KIT FOR 5T989X-982X RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標準包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱:82EBV2081 |
發(fā)布緊急采購，3分鐘左右您將得到回復。