參數(shù)資料
型號: IDT5T9890NLI8
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 10/37頁
文件大小: 0K
描述: IC CLK DRIVER 2.5V PLL 68-VFQFPN
產(chǎn)品變化通告: Product Discontinuation 05/Jan/2011
標準包裝: 2,500
類型: PLL 時鐘驅(qū)動器
PLL: 帶旁路
輸入: eHSTL,HSTL,LVPECL,LVTTL
輸出: eHSTL,HSTL,LVTTL
電路數(shù): 1
比率 - 輸入:輸出: 2:10
差分 - 輸入:輸出: 是/無
頻率 - 最大: 250MHz
除法器/乘法器: 是/無
電源電壓: 2.3 V ~ 2.7 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 68-VFQFN 裸露焊盤
供應商設(shè)備封裝: 68-VFQFPN(10x10)
包裝: 帶卷 (TR)
其它名稱: 5T9890NLI8
18
INDUSTRIALTEMPERATURERANGE
IDT5T9890
EEPROM PROGRAMMABLE 2.5V PROGRAMMABLE SKEW PLL CLOCK DRIVER
SINGLE-ENDED INPUT AC TEST CONDITIONS FOR 1.8V LVTTL
Symbol
Parameter
Value
Units
VIH
Input HIGH Voltage(1)
VDDI
V
VIL
InputLOWVoltage
0V
VTHI
InputTimingMeasurementReferenceLevel(2)
VDDI/2
mV
tR, tF
InputSignalEdgeRate(3)
2
V/ns
NOTES:
1. VDDI is the nominal 1.8V supply (1.8V ± 0.15V) of the part or source driving the input.
2. A nominal 900mV timing measurement reference level is specified to allow constant, repeatable results in an automatic test equipment (ATE) environment.
3. The input signal edge rate of 2V/ns or greater is to be maintained in the 10% to 90% range of the input waveform.
DIFFERENTIAL INPUT AC TEST CONDITIONS FOR 1.8V LVTTL
Symbol
Parameter
Value
Units
VDIF
Input Signal Swing(1)
VDDI
V
VX
DifferentialInputSignalCrossingPoint(2)
VDDI/2
mV
VTHI
InputTimingMeasurementReferenceLevel(3)
CrossingPoint
V
tR, tF
InputSignalEdgeRate(4)
1.8
V/ns
NOTES:
1. VDDI is the nominal 1.8V supply (1.8V ± 0.15V) of the part or source driving the input. A nominal 1.8V peak-to-peak input pulse level is specified to allow consistent, repeatable
results in an automatic test equipment (ATE) environment. This device meets the VDIF (AC) specification under actual use conditions.
2. A nominal 900mV crossing point level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. This device meets the VX specification
under actual use conditions.
3. In all cases, input waveform timing is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 1.8V/ns or greater is to be maintained in the 20% to 80% range of the input waveform.
NOTES:
1. These power consumption characteristics are for all the valid input interfaces and cover the worst case input and output interface combinations.
2. The termination resistors are excluded from these measurements.
3. If the differential input interface is used, the true input is held LOW and the complementary input is held HIGH.
4. Bit 60 = 1.
5. All outputs are at the same interface level.
POWER SUPPLY CHARACTERISTICS FOR 1.8V LVTTL OUTPUTS(1)
Symbol
Parameter
Test Conditions(2)
Typ.
Max
Unit
IDDQ
Quiescent VDD Power Supply Current(3)
VDDQN = Max., REF = LOW, PD = HIGH, nSOE = LOW,
112
150
mA
PLL_EN = HIGH, Outputs enabled, All outputs unloaded
IDDQQ
Quiescent VDDQN Power Supply Current(3)
VDDQN = Max., REF = LOW, PD = HIGH, nSOE = LOW,
3
75
A
PLL_EN = HIGH, Outputs enabled, All outputs unloaded
IDDPD
Power Down Current
VDD = Max., PD = LOW, nSOE = LOW, PLL_EN = HIGH
0.7
3
mA
IDDD
Dynamic VDD Power Supply
VDD = Max., VDDQN = Max., CL = 0pF
18
30
A/MHz
CurrentperOutput
IDDDQ
Dynamic VDDQN Power Supply
VDD = Max., VDDQN = Max., CL = 0pF
19
30
A/MHz
CurrentperOutput
ITOT
Total Power VDD Supply Current(4,5)
VDDQN = 1.8V., FVCO = 100MHz, CL = 15pF
275
400
mA
VDDQN = 1.8V., FVCO = 250MHz, CL = 15pF
310
450
ITOTQ
Total Power VDDQN Supply Current(4,5)
VDDQN = 1.8V., FVCO = 100MHz, CL = 15pF
135
200
mA
VDDQN = 1.8V., FVCO = 250MHz, CL = 15pF
200
300
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