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參數(shù)資料
| 型號(hào)： | ID82C88 |
| 廠(chǎng)商： | HARRIS SEMICONDUCTOR |
| 元件分類(lèi)： | 外設(shè)及接口 |
| 英文描述： | CMOS Bus Controller |
| 中文描述： | 8 MHz, CONTROL AND CMD SIG GEN, CDIP20 |
| 文件頁(yè)數(shù)： | 7/10頁(yè) |
| 文件大?。?/td> | 129K |
| 代理商： | ID82C88 |
4-339
Timing Waveforms
(Note 3)
NOTES:
1. Address/Data Bus is shown only for reference purposes.
2. Leading edge of ALE and MCE is determined by the falling edge of CLK or status going active. Whichever occurs last.
3. All timing measurements are made at 1.5V unless otherwise specified.
FIGURE 1.
STATE
CLK
S2, S1, S0
ADDRESS/DATA
ALE
MRDC, IORC, INTA,
AMWC, AIOWC
MWTC, IOWC
DEN (READ)
(INTA)
PDEN (READ)
(INTA)
DEN (WRITE)
PDEN (WRITE)
DT/R (READ)
(INTA)
MCE
T
4
T
1
T
2
T
3
T
4
TCLCL
(1)
TCLCH
(2)
TCHCL
(3)
TCLSH
(7)
TSHCL
(6)
TSVCH
(4)
TCHSV
(5)
TCLLH
(10)
TSVLH (12)
TCHLL (14)
TCLML
(15)
TCLML
(15)
TCLMH
(16)
TCVNX
(9)
TCVNV
(8)
TCVNV
(8)
TCVNX
(9)
TCHDTH
(18)
TCHDTL
(17)
TCHDTH
(18)
TCLMCH
(11)
TSVMCH
(13)
TCVNX
(9)
2
2
1
WRITE
DATA VALID
ADDRESS
VALID
82C88
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