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參數(shù)資料
| 型號(hào)： | ICS650-07C |
| 英文描述： | Networking Clock Source |
| 中文描述： | 網(wǎng)絡(luò)時(shí)鐘源 |
| 文件頁數(shù)： | 3/5頁 |
| 文件大?。?/td> | 73K |
| 代理商： | ICS650-07C |
ICS650-07C
Networking Clock Source
MDS 650-07C A
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA 95126(408)295-9800tel www.icst.com
3
Revision 101399
Printed 11/28/00
PRELIMINARY INFORMATION
Pin Descriptions
Key: TI = tri-level input; XI, XO = crystal connections; I = Input with internal pull-up resistor;
O = Output; P = power supply connection
Pin Assignment
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Name
ACS0
X2
X1/ICLK
VDD
ACS1
GND
CLKC1
CLKC2
CLKB2
CLKB1
CCS
DC
CLKA2
GND
OE
VDD
CLKA1
REFOUT
BCS0
BCS1
Type
TI
XO
XI
P
I
P
O
O
O
O
TI
-
O
P
I
P
O
O
TI
I
Description
A Clock Select 0. Selects outputs on CLKA1 and CLKA2 per table on page 2.
Crystal connection. Connect to a crystal or leave unconnected for a clock input.
Crystal connection. Connect to a fundamental crystal or clock input.
Connect to +3.3 V or +5 V. Must be same as other VDD.
A Clock Select 1. Selects outputs on CLKA1 and CLKA2 per table on page 2.
Connect to ground.
Clock C output 1. Depends on setting of CCS per table on page 2.
Clock C output 2. Depends on setting of CCS per table on page 2. Same as CLKC1.
Clock B output 2. Depends on setting of BCS1, 0 per table on page 2.
Clock B output 1. Depends on setting of BCS1, 0 per table on page 2.
Clock C Select pin. Selects outputs on CLKC1 and CLKC2 per table on page 2.
Don't Connect. Do not connect anything to this pin.
Clock A output 2. Depends on setting of ACS1, 0 per table on page 2.
Connect to ground.
Output Enable. Tri-states all outputs when low.
Connect to +3.3 V or +5 V. Must be same as other VDD.
Clock A output 1. Depends on setting of ACS1, 0 per table on page 2.
Buffered Reference clock Output. Same frequency as crystal or clock input.
B Clock Select 0. Selects outputs on CLKB1 and CLKB2 per table on page 2.
B Clock Select 1. Selects outputs on CLKB1 and CLKB2 per table on page 2.
1
2
3
4
5
6
7
8
9
16
15
14
13
12
11
VDD
ACS1
CLKB2
CLKB1
X2
VDD
OE
20 pin (150 mil) SSOP
10
BCS0
REFOUT
CLKA1
X1/ICLK
ACS0
BCS1
DC
CCS
CLKC2
CLKC1
18
17
19
20
GND
CLKA2
GND
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS650-11B | BroadCom Networking Clock Synthesizer |
| ICS650R-11I | BroadCom Networking Clock Synthesizer |
| ICS650R-11IT | BroadCom Networking Clock Synthesizer |
| ICS650-14B | Networking System Clock |
| ICS650-22 | PVR and STB Clock Source |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS650-11B | 制造商:ICS 制造商全稱:ICS 功能描述:BroadCom Networking Clock Synthesizer |
| ICS650-12 | 制造商:ICS 制造商全稱:ICS 功能描述:MPEG Clock Synthesizer |
| ICS650-14B | 制造商:ICS 制造商全稱:ICS 功能描述:Networking System Clock |
| ICS650-21 | 制造商:ICS 制造商全稱:ICS 功能描述:System Peripheral Clock Source |
| ICS650-22 | 制造商:ICS 制造商全稱:ICS 功能描述:PVR and STB Clock Source |
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