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參數(shù)資料
| 型號： | ICS507M-02I |
| 元件分類： | 圓形連接器 |
| 英文描述： | Circular Connector; MIL SPEC:MIL-C-5015 E/F/R; Body Material:Aluminum Alloy; Series:SG3102; Number of Contacts:19; Connector Shell Size:24; Connecting Termination:Solder; Circular Shell Style:Box Mount Receptacle |
| 中文描述： | PECL的時鐘合成器 |
| 文件頁數(shù)： | 2/5頁 |
| 文件大?。?/td> | 49K |
| 代理商： | ICS507M-02I |
ICS507-01/02
PECL Clock Synthesizer
MDS 507 C
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA 95126 (408)295-9800tel www.icst.com
2
Revision 042600
Printed 11/13/00
Pin Assignment
Pin Descriptions
Key: I=Input, O=output, TI=tri-level input, P=power supply connection; XI, XO=crystal connections
Clock Multiplier Select Table
16
15
14
13
12
11
10
9
16 pin narrow (150 mil) SOIC
1
2
3
4
5
6
7
8
ICS507-01/02
VDD
GND
GND
NC
X1/ICLK
VDD
S1
PECL
RES
PECL
NC
NC
S0
OE
NC
X2
0 = connect pin directly to ground
1 = connect pin directly to VDD
M = leave unconnected (floating)
S1
0
0
0
M
M
M
1
1
1
S0
0
M
1
0
M
1
0
M
1
Multiplier
9.72X*
10X
12X
6.25X
8X
5X
2X
3X
4X
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Name
X1/ICLK
VDD
VDD
S1
GND
GND
NC
PECL
PECL
RES
NC
NC
OE
S0
NC
X2
Type
XI
P
P
T I
P
P
-
O
O
I
-
-
I
T I
-
XO
Description
Crystal or clock connection. Connect to a fundamental parallel mode crystal, or clock.
VDD. Connect to +3.3 V or +5 V, and to VDD on pin 3.
VDD. Connect to VDD on pin 2. Decouple with pin 5.
Multiplier select pin 1. Determines output frequency per table above.
Connect to ground.
Connect to ground.
No connect. Nothing is connected internally to this pin.
PECL Output. Connect to resistor load as shown on page one.
Complementary PECL Output. Connect to resistor load as shown on page one.
Bias Resistor Input. Connect a resistor between this pin and VDD.
No connect. Nothing is connected internally to this pin.
No connect. Nothing is connected internally to this pin.
Output Enable. Tri-states both outputs when low. Internal pull-up.
Multiplier select pin 0. Determines output frequency per table above.
No Connect. Nothing is connected internally to this pin.
Cr stal connection. Connect to cr stal, or leave unconnected for clock input.
*Use this selection to get
155.52 MHz from a 16 MHz
input.
For lowest phase noise
generation of 155.52 MHz,
use a 19.44 MHz crystal and
the 8X selection.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS507M-02IT | ER 7C 7#8 PIN RECP |
| ICS507-01 | POWER QUICC |
| ICS507-01-DPK | PECL Clock Synthesizer |
| ICS507-01-DSW | PECL Clock Synthesizer |
| ICS507-01-DWF | PECL Clock Synthesizer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS507M-02IT | 制造商:ICS 制造商全稱:ICS 功能描述:PECL Clock Synthesizer |
| ICS507-XX | 制造商:ICS 制造商全稱:ICS 功能描述:PECL Clock Synthesizer |
| ICS508 | 制造商:ICS 制造商全稱:ICS 功能描述:PECL to CMOS Converter |
| ICS508-DPK | 制造商:ICS 制造商全稱:ICS 功能描述:PECL to CMOS Converter |
| ICS508-DWF | 制造商:ICS 制造商全稱:ICS 功能描述:PECL to CMOS Converter |
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