參數(shù)資料
型號(hào): ICS1893BFILF
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 108/133頁
文件大?。?/td> 0K
描述: PHYCEIVER LOW PWR 3.3V 48-SSOP
標(biāo)準(zhǔn)包裝: 30
系列: PHYceiver™
類型: PHY 收發(fā)器
規(guī)程: MII
電源電壓: 3.14 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 48-BSSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 48-SSOP
包裝: 管件
其它名稱: 1893BFILF
ICS1893BF, Rev. F, 5/13/10
May, 2010
76
Chapter 7 Management Register Set
ICS1893BF Data Sheet - Release
Copyright 2009, IDT, Inc.
All rights reserved.
7.11 Register 16: Extended Control Register
Table 7-16 lists the bits for the Extended Control Register, which the ICS1893BF provides to allow an STA
to customize the operations of the device.
Note:
1. For an explanation of acronyms used in Table 7-16, see Chapter 1, “Abbreviations and Acronyms”.
2. During any write operation to any bit in this register, the STA must write the default value to all
Reserved bits.
The default is the state of this pin at reset.
Table 7-16. Extended Control Register (register 16 [0x10])
Bit
Definition
When Bit = 0
When Bit = 1
Ac-
cess
SF
De-
fault
Hex
16.15 Command Override Write
enable
Disabled
Enabled
RW
SC
0
16.14 ICS reserved
Read unspecified
RW/0
0
16.13 ICS reserved
Read unspecified
RW/0
0
16.12 ICS reserved
Read unspecified
RW/0
0
16.11
ICS reserved
Read unspecified
RW/0
0
16.10 PHY Address Bit 4
For a detailed explanation of this bit’s operation,
RO
P4RD
16.9
PHY Address Bit 3
For a detailed explanation of this bit’s operation,
RO
P3TD
16.8
PHY Address Bit 2
For a detailed explanation of this bit’s operation,
RO
P2LI
16.7
PHY Address Bit 1
For a detailed explanation of this bit’s operation,
RO
P1CL
16.6
PHY Address Bit 0
For a detailed explanation of this bit’s operation,
RO
P0AC
16.5
Stream Cipher Test Mode Normal operation
Test mode
RW
0
16.4
ICS reserved
Read unspecified
RW/0
16.3
NRZ/NRZI encoding
NRZ encoding
NRZI encoding
RW
1
8
16.2
Transmit invalid codes
Disabled
Enabled
RW
0
16.1
ICS reserved
Read unspecified
RW/0
0
16.0
Stream Cipher disable
Stream Cipher enabled Stream Cipher disabled
RW
0
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ICS1893BFLFT 功能描述:PHYCEIVER LOW PWR 3.3V 48-SSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器,接收器,收發(fā)器 系列:PHYceiver™ 標(biāo)準(zhǔn)包裝:250 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP(0.173",4.40mm 寬) 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR)
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