- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360742 > ICS1526GLFTR Video Clock Synthesizer PDF資料下載
參數(shù)資料
| 型號(hào)： | ICS1526GLFTR |
| 英文描述： | Video Clock Synthesizer |
| 中文描述： | 視頻時(shí)鐘合成器 |
| 文件頁(yè)數(shù)： | 2/11頁(yè) |
| 文件大?。?/td> | 611K |
| 代理商： | ICS1526GLFTR |
MDS 1526 I
2
Revision 020304
Integrated Circuit Systems, 525 Race Street, San Jose, CA 95126, tel (408) 297-1201
www.icst.com
Section 1
Overview
ICS1526 Preliminary Data Sheet
Section 1
Overview
The ICS1526 is a user-programmable,
high-performance general purpose clock generator. It
is intended for graphics system line-locked and
genlocked applications and provides the clock signals
required by high-performance analog-to-digital
converters.
The ICS1526 has the ability to operate in line-locked
mode with the HSYNC input.
1.1
Phase-Locked Loop
The phase-locked loop has a very wide input frequency
range (8 kHz to 100 MHz). Not only is the ICS1526 an
excellent, general purpose clock synthesizer, but it is
also capable of line-locked operation. Refer to the
block diagram below.
The heart of the ICS1526 is a voltage controlled
oscillator (VCO). The VCOs speed is controlled by the
voltage on the loop filter. This voltage will be described
later in this section.
The VCOs clock output is first passed through the VCO
Divider (VCOD). The VCOD allows the VCO to operate
at higher speeds than the required output clock.
NOTE
: Under normal, locked operation the VCOD has
no effect on the speed of the output clocks, just the
VCO frequency.
The output of the VCOD is the full speed output
frequency seen on the CLK. This clock is then sent
through the 12-bit internal Feedback Divider (FD). The
feedback divider controls how many clocks are seen
during every cycle of the input reference.
The Phase Frequency Detector (PFD) then compares
the feedback to the input and controls the filter voltage
by enabling and disabling the charge pump. The
charge pump has programmable current drive and will
source and sink current as appropriate to keep the
input and the clock output aligned.
The input HSYNC and VSYNC can be conditioned by a
high-performance Schmitt-trigger by sharpening the
rising/falling edge.
The HSYNC_out and VSYNC_out signals are aligned
with the output clock (CLK) via a set of flip flops.
1.2
Output Drivers and Logic Inputs
The ICS1526 uses low-voltage TTL (LVTTL) inputs and
LVCMOS outputs, operating at the 3.3 V supply
voltage. The LVTTL inputs are 5 V tolerant.
The LVCMOS drive resistive terminations or
transmission lines.
1.3
Automatic Power-On Reset Detection
The ICS1526 has automatic power-on reset detection
(POR) circuitry and it resets itself if the supply voltage
drops below threshold values. No external connection
to a reset signal is required.
PFD
CP
VCO
VCOD
2,4,8,16
HSYNC
Flip-flop
VSYNC
CLK
HSYNC_out
VSYNC_out
FD
12..4103
Flip-flop
Divider
3..129
OSC
Figure 1-1
Simplified Block Diagram
Note: Polarity controls and other circuit elements are not shown in above diagram for simplicity
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS1531 | Triple 8-bit MSPS A/D Converters with Line-Locked Clock Generator |
| ICS1560M-001 | Video/Graphics Clock Generator |
| ICS1560M-003 | Video/Graphics Clock Generator |
| ICS1560N-001 | Video/Graphics Clock Generator |
| ICS1560N-003 | Video/Graphics Clock Generator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS1526GT | 功能描述:IC VIDEO CLK SYNTHESIZER 16TSSOP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標(biāo)準(zhǔn)包裝:96 系列:- 類型:時(shí)鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無(wú)/無(wú) 頻率 - 最大:133.3MHz 除法器/乘法器:是/無(wú) 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
| ICS1527 | 制造商:ICS 制造商全稱:ICS 功能描述:Video Clock Synthesizer |
| ICS1527G-110 | 功能描述:IC VIDEO CLK SYNTHESIZER 16TSSOP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標(biāo)準(zhǔn)包裝:96 系列:- 類型:時(shí)鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無(wú)/無(wú) 頻率 - 最大:133.3MHz 除法器/乘法器:是/無(wú) 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
| ICS1527G-110LF | 功能描述:IC VIDEO CLK SYNTHESIZER 16TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時(shí)鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS1527G-110LFT | 功能描述:IC VIDEO CLK SYNTHESIZER 16TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時(shí)鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。