參數(shù)資料
型號(hào)： HYS72T512022EP
廠商： QIMONDA
英文描述： 240-Pin Dual Die Registered DDR2 SDRAM Modules
中文描述： 240針雙模具注冊(cè)DDR2 SDRAM內(nèi)存模塊
文件頁(yè)數(shù)： 26/36頁(yè)
文件大小： 980K
代理商： HYS72T512022EP
Internet Data Sheet
Rev. 1.0, 2007-03
03292007-RHOW-C5L6
26
HYS72T[512/1G]0x2EP–[3S/3.7]–B
Registerd DDR2 SDRAM Module
TABLE 18
Definitions for
I
DD
Distributed Refresh Current
t
CK
=
t
CK.MIN.
, Refresh command every
t
RFC
=
t
REFI
interval, CKE is LOW and CS is HIGH between valid
commands, Other control and address inputs are SWITCHING, Data bus inputs are SWITCHING.
Self-Refresh Current
CKE
≤
0.2 V; external clock off, CK and CK at 0 V; Other control and address inputs are FLOATING, Data
bus inputs are FLOATING.
I
DD6
current values are guaranteed up to
T
CASE
of 85
°
C max.
All Bank Interleave Read Current
All banks are being interleaved at minimum
t
RC
without violating
t
RRD
using a burst length of 4. Control
and address bus inputs are STABLE during DESELECTS.
I
out
= 0 mA.
1)
V
DDQ
= 1.8 V
±
0.1 V;
V
DD
= 1.8 V
±
0.1 V
2)
I
DD
specifications are tested after the device is properly initialized and
I
DD
parameter are specified with ODT disabled.
3) Definitions for
I
DD
see
Table 18
4) For two rank modules: for all active current measurements the other rank is in Precharge Power-Down Mode
I
DD2P
5) For details and notes see the relevant Qimonda component data sheet
6)
I
,
I
and
I
current measurements are defined with the outputs disabled (
I
= 0 mA). To achieve this on module level the output
buffers can be disabled using an EMRS(1) (Extended Mode Register Command) by setting A12 bit to HIGH.
I
DD5D
I
DD6
I
DD7
6)
Parameter
Description
LOW
STABLE
FLOATING
SWITCHING
V
IN
≤
V
IL(ac).MAX
, HIGH is defined as
V
IN
≥
V
IH(ac).MIN
Inputs are stable at a HIGH or LOW level
Inputs are
V
REF
=
V
DDQ
/2
Inputs are changing between HIGH and LOW every other clock (once per 2 cycles) for address and control
signals, and inputs changing between HIGH and LOW every other data transfer (once per cycle) for DQ
signals not including mask or strobes
Parameter
Symbol Note
1)2)3)4)5)
相關(guān)PDF資料
PDF描述
HYS72T512022EP-3.7-B 240-Pin Dual Die Registered DDR2 SDRAM Modules
HYS72T512022EP-3S-B 240-Pin Dual Die Registered DDR2 SDRAM Modules
HYS72T512022ER 240-Pin Dual Die Registered DDR2 SDRAM Modules
HYS72T512022HFN-3.7-A 240-Pin Fully-Buffered DDR2 SDRAM Modules DDR2 SDRAM
HYS72T512122HFN-3.7-A 240-Pin Fully-Buffered DDR2 SDRAM Modules DDR2 SDRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HYS72T512022EP-3.7-B 制造商:QIMONDA 制造商全稱(chēng):QIMONDA 功能描述:240-Pin Dual Die Registered DDR2 SDRAM Modules
HYS72T512022EP-3S-B 制造商:QIMONDA 制造商全稱(chēng):QIMONDA 功能描述:240-Pin Dual Die Registered DDR2 SDRAM Modules
HYS72T512022ER 制造商:QIMONDA 制造商全稱(chēng):QIMONDA 功能描述:240-Pin Dual Die Registered DDR2 SDRAM Modules
HYS72T512022HFN-3.7-A 制造商:QIMONDA 制造商全稱(chēng):QIMONDA 功能描述:240-Pin Fully-Buffered DDR2 SDRAM Modules DDR2 SDRAM
HYS72T512022HR 制造商:QIMONDA 制造商全稱(chēng):QIMONDA 功能描述:240-Pin Registered DDR2 SDRAM Modules
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*