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| 型號： | HYS72T128000EU-2.5-C2 |
| 廠商： | QIMONDA AG |
| 元件分類： | DRAM |
| 英文描述： | 128M X 72 DDR DRAM MODULE, 0.4 ns, DMA240 |
| 封裝： | GREEN, UDIMM-240 |
| 文件頁數(shù)： | 34/59頁 |
| 文件大?。?/td> | 3071K |
| 代理商： | HYS72T128000EU-2.5-C2 |
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HYS[64/72]T[128/256]0x0EU–[19F/1.9/25F/2.5/3S]–C2
Unbuffered DDR2 SDRAM Modules
Internet Data Sheet
Rev. 1.00, 2008-06
4
12032007-I9KE-FFWO
1.2
Description
The
Qimonda
HYS[64/72]T[128/256]0x0EU–
[19F/1.9/25F/2.5/3S]–C2
module
family
are
Unbuffered DIMM modules “UDIMMs” with 30 mm height
based on DDR2 technology. DIMMs are available as non-
ECC modules in 128M
× 64 (1GB), 256M × 64 (2GB) and as
ECC modules
in 128M
× 72 (1GB), 256M × 72 (2GB) in
organization and density, intended for mounting into 240-pin
connector sockets.
The memory array is designed with
1 Gbit Double-Data-
Rate-Two (DDR2) Synchronous DRAMs.
Decoupling
capacitors are mounted on the PCB board. The DIMMs
feature serial presence detect based on a serial E
2PROM
device using the 2-pin I
2C protocol. The first 128 bytes are
programmed with configuration data and are write protected;
the second 128 bytes are available to the customer.
TABLE 2
Ordering Information
Min. Row Cycle Time
t
RC
56.25
58.125
57.5
60
ns
Precharge-All (8 banks) command
period
t
PREA
13.125
15
17.5
18
ns
1)2)
1) This
t
PREA value is the minimum value at which this chip will be functional.
2) Precharge-All command for an 8 bank device will equal to
t
RP + 1 × tCK or tnRP + 1 × nCK, depending on the speed bin,
where
t
nRP = RU{ tRP / tCK(avg) } and tRP is the value for a single bank precharge.
QAG Speed Code
–19F
–1.9
–25F
–2.5
–3S
Unit
Note
DRAM Speed Grade
DDR2
–1066E
–1066F
–800D
–800E
–667D
Module Speed Grade
PC2
–8500E
–8500F
–6400D
–6400E
–5300D
CAS-RCD-RP latencies
6–6–6
7–7–7
5–5–5
6–6–6
5–5–5
t
CK
Product Type
1)
Compliance Code
2)
Description
SDRAM Technology
PC2-8500 (6-6-6)
HYS64T256020EU-19F-C2
2GB 2R
×8 PC2–8500U–666–13–E0
2 Ranks, Non-ECC
1Gbit (
×8)
HYS64T128000EU-19F-C2
1GB 1R
×8 PC2–8500U–666–13–D0
1 Rank, Non-ECC
1Gbit (
×8)
PC2-8500 (7-7-7)
HYS64T256020EU-1.9-C2
2GB 2R
×8 PC2–8500U–777–13–E0
2 Ranks, Non-ECC
1Gbit (
×8)
HYS64T128000EU-1.9-C2
1GB 1R
×8 PC2–8500U–777–13–D0
1 Rank, Non-ECC
1Gbit (
×8)
PC2-6400 (5-5-5)
HYS64T256020EU-25F-C2
2GB 2R
×8 PC2–6400U–555–12–E0
2 Ranks, Non-ECC
1Gbit (
×8)
HYS72T256020EU-25F-C2
2GB 2R
×8 PC2–6400E–555–12–G0
2 Ranks, ECC
1Gbit (
×8)
HYS64T128000EU-25F-C2
1GB 1R
×8 PC2–6400U–555–12–D0
1 Rank, Non-ECC
1Gbit (
×8)
HYS72T128000EU-25F-C2
1GB 1R
×8 PC2–6400E–555–12–F0
1 Rank, ECC
1Gbit (
×8)
PC2-6400 (6-6-6)
HYS64T256020EU-2.5-C2
2GB 2R
×8 PC2–6400U–666–12–E0
2 Ranks, Non-ECC
1Gbit (
×8)
HYS72T256020EU-2.5-C2
2GB 2R
×8 PC2–6400E–666–12–G0
2 Ranks, ECC
1Gbit (
×8)
HYS64T128000EU-2.5-C2
1GB 1R
×8 PC2–6400U–666–12–D0
1 Rank, Non-ECC
1Gbit (
×8)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYS72T64000EP-3.7-B2 | 64M X 72 DDR DRAM MODULE, DMA240 |
| HZ20-1 | 19.25 V, 0.5 W, SILICON, UNIDIRECTIONAL VOLTAGE REGULATOR DIODE, DO-35 |
| HZ6B1L | 5.65 V, 0.4 W, SILICON, UNIDIRECTIONAL VOLTAGE REGULATOR DIODE, DO-35 |
| HZ9.1CP | 9.65 V, 1 W, SILICON, UNIDIRECTIONAL VOLTAGE REGULATOR DIODE, DO-41 |
| HZB6.8MWA | 6.8 V, 0.2 W, SILICON, UNIDIRECTIONAL VOLTAGE REGULATOR DIODE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYS72T128000GR | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:DDR2 Registered Memory Modules |
| HYS72T128000GR-37-A | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:DDR2 Registered Memory Modules |
| HYS72T128000GR-5-A | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:DDR2 Registered Memory Modules |
| HYS72T128000HP | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Registered DDR2 SDRAM Modules |
| HYS72T128000HP-2.5-B | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Registered DDR2 SDRAM Modules |
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