參數(shù)資料
型號(hào): HYS72D64301HBR-6-B
廠商: QIMONDA AG
元件分類: DRAM
英文描述: 184 - Pin Registered Double-Data-Rate SDRAM Module
中文描述: 64M X 72 DDR DRAM MODULE, 0.7 ns, DMA184
封裝: GREEN, RDIMM-184
文件頁(yè)數(shù): 11/51頁(yè)
文件大?。?/td> 1115K
代理商: HYS72D64301HBR-6-B
Internet Data Sheet
Rev. 1.42, 2007-01
03292006-7CZA-YS85
11
HYS72D[64/128/256]xxx[G/H]BR–[5/6/7]–B
Registered DDR SDRAM Module
TABLE 5
Abbrevations for Pin Type
TABLE 6
Abbrevations for Buffer Type
TABLE 7
Address Format
Other Pins
82
9, 16, 17,
71, 75, 76,
90, 101,
102, 103,
113, 163,
173
V
DDID
NC
O
NC
OD
V
DD
Identification
Not connected
Abbreviation
Description
I
O
I/O
AI
PWR
GND
NU
NC
Standard input-only pin. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
Ground
Not Usable (JEDEC Standard)
Not Connected (JEDEC Standard)
Abbreviation
Description
SSTL
LV-CMOS
CMOS
OD
Serial Stub Terminalted Logic (SSTL2)
Low Voltage CMOS
CMOS Levels
Open Drain. The corresponding pin has 2 operational states, active low and
tristate, and allows multiple devices to share as a wire-OR.
Density
Organization
Memory
Ranks
SDRAMs
# of
SDRAMs
# of row/bank/
column bits
Refresh
Period
Interval
512 MB
1 GB
1 GB
2 GB
64M
×
72
128M
×
72
128M
×
72
256M
×
72
1
1
2
2
64M
×
8
128M
×
4
64M
×
8
128M
×
4
8
18
18
36
13/2/11
13/2/12
13/2/11
13/2/12
8K
8K
8K
8K
64 ms
64 ms
64 ms
64 ms
7.8
μ
s
7.8
μ
s
7.8
μ
s
7.8
μ
s
Pin#
Name
Pin
Type
Buffer
Type
Function
相關(guān)PDF資料
PDF描述
HYS72D64301 184 - Pin Registered Double-Data-Rate SDRAM Module
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